/***************************************************************************//**
* \file cyreg_peri_ms.h
*
* \brief
* PERI_MS register definition header
*
* \note
* Generator version: 1.6.0.481
* Database revision: TVIIBH4M_PR3_0
*
********************************************************************************
* \copyright
* Copyright 2016-2021, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/

#ifndef _CYREG_PERI_MS_H_
#define _CYREG_PERI_MS_H_

#include "cyip_peri_ms_v3.h"

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR0)
  */
#define CYREG_PERI_MS_PPU_PR0_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020000UL)
#define CYREG_PERI_MS_PPU_PR0_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020004UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020010UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020014UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020018UL)
#define CYREG_PERI_MS_PPU_PR0_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002001CUL)
#define CYREG_PERI_MS_PPU_PR0_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020020UL)
#define CYREG_PERI_MS_PPU_PR0_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020024UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020030UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020034UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020038UL)
#define CYREG_PERI_MS_PPU_PR0_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002003CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR1)
  */
#define CYREG_PERI_MS_PPU_PR1_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020040UL)
#define CYREG_PERI_MS_PPU_PR1_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020044UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020050UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020054UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020058UL)
#define CYREG_PERI_MS_PPU_PR1_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002005CUL)
#define CYREG_PERI_MS_PPU_PR1_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020060UL)
#define CYREG_PERI_MS_PPU_PR1_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020064UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020070UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020074UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020078UL)
#define CYREG_PERI_MS_PPU_PR1_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002007CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR2)
  */
#define CYREG_PERI_MS_PPU_PR2_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020080UL)
#define CYREG_PERI_MS_PPU_PR2_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020084UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020090UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020094UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020098UL)
#define CYREG_PERI_MS_PPU_PR2_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002009CUL)
#define CYREG_PERI_MS_PPU_PR2_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400200A0UL)
#define CYREG_PERI_MS_PPU_PR2_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400200A4UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400200B0UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400200B4UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400200B8UL)
#define CYREG_PERI_MS_PPU_PR2_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400200BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR3)
  */
#define CYREG_PERI_MS_PPU_PR3_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400200C0UL)
#define CYREG_PERI_MS_PPU_PR3_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400200C4UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400200D0UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400200D4UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400200D8UL)
#define CYREG_PERI_MS_PPU_PR3_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400200DCUL)
#define CYREG_PERI_MS_PPU_PR3_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400200E0UL)
#define CYREG_PERI_MS_PPU_PR3_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400200E4UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400200F0UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400200F4UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400200F8UL)
#define CYREG_PERI_MS_PPU_PR3_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400200FCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR4)
  */
#define CYREG_PERI_MS_PPU_PR4_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020100UL)
#define CYREG_PERI_MS_PPU_PR4_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020104UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020110UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020114UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020118UL)
#define CYREG_PERI_MS_PPU_PR4_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002011CUL)
#define CYREG_PERI_MS_PPU_PR4_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020120UL)
#define CYREG_PERI_MS_PPU_PR4_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020124UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020130UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020134UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020138UL)
#define CYREG_PERI_MS_PPU_PR4_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002013CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR5)
  */
#define CYREG_PERI_MS_PPU_PR5_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020140UL)
#define CYREG_PERI_MS_PPU_PR5_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020144UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020150UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020154UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020158UL)
#define CYREG_PERI_MS_PPU_PR5_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002015CUL)
#define CYREG_PERI_MS_PPU_PR5_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020160UL)
#define CYREG_PERI_MS_PPU_PR5_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020164UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020170UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020174UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020178UL)
#define CYREG_PERI_MS_PPU_PR5_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002017CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR6)
  */
#define CYREG_PERI_MS_PPU_PR6_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020180UL)
#define CYREG_PERI_MS_PPU_PR6_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020184UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020190UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020194UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020198UL)
#define CYREG_PERI_MS_PPU_PR6_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002019CUL)
#define CYREG_PERI_MS_PPU_PR6_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400201A0UL)
#define CYREG_PERI_MS_PPU_PR6_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400201A4UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400201B0UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400201B4UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400201B8UL)
#define CYREG_PERI_MS_PPU_PR6_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400201BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR7)
  */
#define CYREG_PERI_MS_PPU_PR7_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400201C0UL)
#define CYREG_PERI_MS_PPU_PR7_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400201C4UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400201D0UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400201D4UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400201D8UL)
#define CYREG_PERI_MS_PPU_PR7_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400201DCUL)
#define CYREG_PERI_MS_PPU_PR7_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400201E0UL)
#define CYREG_PERI_MS_PPU_PR7_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400201E4UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400201F0UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400201F4UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400201F8UL)
#define CYREG_PERI_MS_PPU_PR7_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400201FCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR8)
  */
#define CYREG_PERI_MS_PPU_PR8_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020200UL)
#define CYREG_PERI_MS_PPU_PR8_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020204UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020210UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020214UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020218UL)
#define CYREG_PERI_MS_PPU_PR8_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002021CUL)
#define CYREG_PERI_MS_PPU_PR8_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020220UL)
#define CYREG_PERI_MS_PPU_PR8_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020224UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020230UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020234UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020238UL)
#define CYREG_PERI_MS_PPU_PR8_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002023CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR9)
  */
#define CYREG_PERI_MS_PPU_PR9_SL_ADDR   ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020240UL)
#define CYREG_PERI_MS_PPU_PR9_SL_SIZE   ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020244UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT0   ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020250UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT1   ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020254UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT2   ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020258UL)
#define CYREG_PERI_MS_PPU_PR9_SL_ATT3   ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002025CUL)
#define CYREG_PERI_MS_PPU_PR9_MS_ADDR   ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020260UL)
#define CYREG_PERI_MS_PPU_PR9_MS_SIZE   ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020264UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT0   ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020270UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT1   ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020274UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT2   ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020278UL)
#define CYREG_PERI_MS_PPU_PR9_MS_ATT3   ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002027CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR10)
  */
#define CYREG_PERI_MS_PPU_PR10_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020280UL)
#define CYREG_PERI_MS_PPU_PR10_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020284UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020290UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020294UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020298UL)
#define CYREG_PERI_MS_PPU_PR10_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002029CUL)
#define CYREG_PERI_MS_PPU_PR10_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400202A0UL)
#define CYREG_PERI_MS_PPU_PR10_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400202A4UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400202B0UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400202B4UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400202B8UL)
#define CYREG_PERI_MS_PPU_PR10_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400202BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR11)
  */
#define CYREG_PERI_MS_PPU_PR11_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400202C0UL)
#define CYREG_PERI_MS_PPU_PR11_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400202C4UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400202D0UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400202D4UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400202D8UL)
#define CYREG_PERI_MS_PPU_PR11_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400202DCUL)
#define CYREG_PERI_MS_PPU_PR11_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400202E0UL)
#define CYREG_PERI_MS_PPU_PR11_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400202E4UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400202F0UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400202F4UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400202F8UL)
#define CYREG_PERI_MS_PPU_PR11_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400202FCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR12)
  */
#define CYREG_PERI_MS_PPU_PR12_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020300UL)
#define CYREG_PERI_MS_PPU_PR12_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020304UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020310UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020314UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020318UL)
#define CYREG_PERI_MS_PPU_PR12_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002031CUL)
#define CYREG_PERI_MS_PPU_PR12_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020320UL)
#define CYREG_PERI_MS_PPU_PR12_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020324UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020330UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020334UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020338UL)
#define CYREG_PERI_MS_PPU_PR12_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002033CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR13)
  */
#define CYREG_PERI_MS_PPU_PR13_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020340UL)
#define CYREG_PERI_MS_PPU_PR13_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020344UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020350UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020354UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020358UL)
#define CYREG_PERI_MS_PPU_PR13_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002035CUL)
#define CYREG_PERI_MS_PPU_PR13_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x40020360UL)
#define CYREG_PERI_MS_PPU_PR13_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x40020364UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x40020370UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x40020374UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x40020378UL)
#define CYREG_PERI_MS_PPU_PR13_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x4002037CUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR14)
  */
#define CYREG_PERI_MS_PPU_PR14_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x40020380UL)
#define CYREG_PERI_MS_PPU_PR14_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x40020384UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x40020390UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x40020394UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x40020398UL)
#define CYREG_PERI_MS_PPU_PR14_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x4002039CUL)
#define CYREG_PERI_MS_PPU_PR14_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400203A0UL)
#define CYREG_PERI_MS_PPU_PR14_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400203A4UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400203B0UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400203B4UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400203B8UL)
#define CYREG_PERI_MS_PPU_PR14_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400203BCUL)

/**
  * \brief Programmable protection structure pair (PERI_MS_PPU_PR15)
  */
#define CYREG_PERI_MS_PPU_PR15_SL_ADDR  ((volatile un_PERI_MS_PPU_PR_SL_ADDR_t*) 0x400203C0UL)
#define CYREG_PERI_MS_PPU_PR15_SL_SIZE  ((volatile un_PERI_MS_PPU_PR_SL_SIZE_t*) 0x400203C4UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT0  ((volatile un_PERI_MS_PPU_PR_SL_ATT0_t*) 0x400203D0UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT1  ((volatile un_PERI_MS_PPU_PR_SL_ATT1_t*) 0x400203D4UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT2  ((volatile un_PERI_MS_PPU_PR_SL_ATT2_t*) 0x400203D8UL)
#define CYREG_PERI_MS_PPU_PR15_SL_ATT3  ((volatile un_PERI_MS_PPU_PR_SL_ATT3_t*) 0x400203DCUL)
#define CYREG_PERI_MS_PPU_PR15_MS_ADDR  ((volatile un_PERI_MS_PPU_PR_MS_ADDR_t*) 0x400203E0UL)
#define CYREG_PERI_MS_PPU_PR15_MS_SIZE  ((volatile un_PERI_MS_PPU_PR_MS_SIZE_t*) 0x400203E4UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT0  ((volatile un_PERI_MS_PPU_PR_MS_ATT0_t*) 0x400203F0UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT1  ((volatile un_PERI_MS_PPU_PR_MS_ATT1_t*) 0x400203F4UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT2  ((volatile un_PERI_MS_PPU_PR_MS_ATT2_t*) 0x400203F8UL)
#define CYREG_PERI_MS_PPU_PR15_MS_ATT3  ((volatile un_PERI_MS_PPU_PR_MS_ATT3_t*) 0x400203FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX0)
  */
#define CYREG_PERI_MS_PPU_FX0_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020800UL)
#define CYREG_PERI_MS_PPU_FX0_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020804UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020810UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020814UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020818UL)
#define CYREG_PERI_MS_PPU_FX0_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002081CUL)
#define CYREG_PERI_MS_PPU_FX0_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020820UL)
#define CYREG_PERI_MS_PPU_FX0_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020824UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020830UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020834UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020838UL)
#define CYREG_PERI_MS_PPU_FX0_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002083CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX1)
  */
#define CYREG_PERI_MS_PPU_FX1_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020840UL)
#define CYREG_PERI_MS_PPU_FX1_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020844UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020850UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020854UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020858UL)
#define CYREG_PERI_MS_PPU_FX1_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002085CUL)
#define CYREG_PERI_MS_PPU_FX1_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020860UL)
#define CYREG_PERI_MS_PPU_FX1_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020864UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020870UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020874UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020878UL)
#define CYREG_PERI_MS_PPU_FX1_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002087CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX2)
  */
#define CYREG_PERI_MS_PPU_FX2_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020880UL)
#define CYREG_PERI_MS_PPU_FX2_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020884UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020890UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020894UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020898UL)
#define CYREG_PERI_MS_PPU_FX2_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002089CUL)
#define CYREG_PERI_MS_PPU_FX2_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400208A0UL)
#define CYREG_PERI_MS_PPU_FX2_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400208A4UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400208B0UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400208B4UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400208B8UL)
#define CYREG_PERI_MS_PPU_FX2_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400208BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX3)
  */
#define CYREG_PERI_MS_PPU_FX3_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400208C0UL)
#define CYREG_PERI_MS_PPU_FX3_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400208C4UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400208D0UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400208D4UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400208D8UL)
#define CYREG_PERI_MS_PPU_FX3_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400208DCUL)
#define CYREG_PERI_MS_PPU_FX3_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400208E0UL)
#define CYREG_PERI_MS_PPU_FX3_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400208E4UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400208F0UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400208F4UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400208F8UL)
#define CYREG_PERI_MS_PPU_FX3_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400208FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX4)
  */
#define CYREG_PERI_MS_PPU_FX4_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020900UL)
#define CYREG_PERI_MS_PPU_FX4_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020904UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020910UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020914UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020918UL)
#define CYREG_PERI_MS_PPU_FX4_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002091CUL)
#define CYREG_PERI_MS_PPU_FX4_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020920UL)
#define CYREG_PERI_MS_PPU_FX4_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020924UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020930UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020934UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020938UL)
#define CYREG_PERI_MS_PPU_FX4_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002093CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX5)
  */
#define CYREG_PERI_MS_PPU_FX5_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020940UL)
#define CYREG_PERI_MS_PPU_FX5_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020944UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020950UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020954UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020958UL)
#define CYREG_PERI_MS_PPU_FX5_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002095CUL)
#define CYREG_PERI_MS_PPU_FX5_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020960UL)
#define CYREG_PERI_MS_PPU_FX5_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020964UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020970UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020974UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020978UL)
#define CYREG_PERI_MS_PPU_FX5_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002097CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX6)
  */
#define CYREG_PERI_MS_PPU_FX6_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020980UL)
#define CYREG_PERI_MS_PPU_FX6_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020984UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020990UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020994UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020998UL)
#define CYREG_PERI_MS_PPU_FX6_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002099CUL)
#define CYREG_PERI_MS_PPU_FX6_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400209A0UL)
#define CYREG_PERI_MS_PPU_FX6_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400209A4UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400209B0UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400209B4UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400209B8UL)
#define CYREG_PERI_MS_PPU_FX6_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400209BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX7)
  */
#define CYREG_PERI_MS_PPU_FX7_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400209C0UL)
#define CYREG_PERI_MS_PPU_FX7_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400209C4UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400209D0UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400209D4UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400209D8UL)
#define CYREG_PERI_MS_PPU_FX7_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400209DCUL)
#define CYREG_PERI_MS_PPU_FX7_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400209E0UL)
#define CYREG_PERI_MS_PPU_FX7_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400209E4UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400209F0UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400209F4UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400209F8UL)
#define CYREG_PERI_MS_PPU_FX7_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400209FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX8)
  */
#define CYREG_PERI_MS_PPU_FX8_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020A00UL)
#define CYREG_PERI_MS_PPU_FX8_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020A04UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020A10UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020A14UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020A18UL)
#define CYREG_PERI_MS_PPU_FX8_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020A1CUL)
#define CYREG_PERI_MS_PPU_FX8_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020A20UL)
#define CYREG_PERI_MS_PPU_FX8_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020A24UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020A30UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020A34UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020A38UL)
#define CYREG_PERI_MS_PPU_FX8_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX9)
  */
#define CYREG_PERI_MS_PPU_FX9_SL_ADDR   ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020A40UL)
#define CYREG_PERI_MS_PPU_FX9_SL_SIZE   ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020A44UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT0   ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020A50UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT1   ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020A54UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT2   ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020A58UL)
#define CYREG_PERI_MS_PPU_FX9_SL_ATT3   ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020A5CUL)
#define CYREG_PERI_MS_PPU_FX9_MS_ADDR   ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020A60UL)
#define CYREG_PERI_MS_PPU_FX9_MS_SIZE   ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020A64UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT0   ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020A70UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT1   ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020A74UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT2   ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020A78UL)
#define CYREG_PERI_MS_PPU_FX9_MS_ATT3   ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX10)
  */
#define CYREG_PERI_MS_PPU_FX10_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020A80UL)
#define CYREG_PERI_MS_PPU_FX10_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020A84UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020A90UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020A94UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020A98UL)
#define CYREG_PERI_MS_PPU_FX10_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020A9CUL)
#define CYREG_PERI_MS_PPU_FX10_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020AA0UL)
#define CYREG_PERI_MS_PPU_FX10_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020AA4UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020AB0UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020AB4UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020AB8UL)
#define CYREG_PERI_MS_PPU_FX10_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX11)
  */
#define CYREG_PERI_MS_PPU_FX11_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020AC0UL)
#define CYREG_PERI_MS_PPU_FX11_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020AC4UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020AD0UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020AD4UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020AD8UL)
#define CYREG_PERI_MS_PPU_FX11_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020ADCUL)
#define CYREG_PERI_MS_PPU_FX11_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020AE0UL)
#define CYREG_PERI_MS_PPU_FX11_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020AE4UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020AF0UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020AF4UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020AF8UL)
#define CYREG_PERI_MS_PPU_FX11_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX12)
  */
#define CYREG_PERI_MS_PPU_FX12_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020B00UL)
#define CYREG_PERI_MS_PPU_FX12_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020B04UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020B10UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020B14UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020B18UL)
#define CYREG_PERI_MS_PPU_FX12_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020B1CUL)
#define CYREG_PERI_MS_PPU_FX12_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020B20UL)
#define CYREG_PERI_MS_PPU_FX12_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020B24UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020B30UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020B34UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020B38UL)
#define CYREG_PERI_MS_PPU_FX12_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX13)
  */
#define CYREG_PERI_MS_PPU_FX13_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020B40UL)
#define CYREG_PERI_MS_PPU_FX13_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020B44UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020B50UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020B54UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020B58UL)
#define CYREG_PERI_MS_PPU_FX13_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020B5CUL)
#define CYREG_PERI_MS_PPU_FX13_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020B60UL)
#define CYREG_PERI_MS_PPU_FX13_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020B64UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020B70UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020B74UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020B78UL)
#define CYREG_PERI_MS_PPU_FX13_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX14)
  */
#define CYREG_PERI_MS_PPU_FX14_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020B80UL)
#define CYREG_PERI_MS_PPU_FX14_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020B84UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020B90UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020B94UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020B98UL)
#define CYREG_PERI_MS_PPU_FX14_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020B9CUL)
#define CYREG_PERI_MS_PPU_FX14_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020BA0UL)
#define CYREG_PERI_MS_PPU_FX14_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020BA4UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020BB0UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020BB4UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020BB8UL)
#define CYREG_PERI_MS_PPU_FX14_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX15)
  */
#define CYREG_PERI_MS_PPU_FX15_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020BC0UL)
#define CYREG_PERI_MS_PPU_FX15_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020BC4UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020BD0UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020BD4UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020BD8UL)
#define CYREG_PERI_MS_PPU_FX15_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020BDCUL)
#define CYREG_PERI_MS_PPU_FX15_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020BE0UL)
#define CYREG_PERI_MS_PPU_FX15_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020BE4UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020BF0UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020BF4UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020BF8UL)
#define CYREG_PERI_MS_PPU_FX15_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX16)
  */
#define CYREG_PERI_MS_PPU_FX16_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020C00UL)
#define CYREG_PERI_MS_PPU_FX16_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020C04UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020C10UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020C14UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020C18UL)
#define CYREG_PERI_MS_PPU_FX16_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020C1CUL)
#define CYREG_PERI_MS_PPU_FX16_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020C20UL)
#define CYREG_PERI_MS_PPU_FX16_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020C24UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020C30UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020C34UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020C38UL)
#define CYREG_PERI_MS_PPU_FX16_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX17)
  */
#define CYREG_PERI_MS_PPU_FX17_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020C40UL)
#define CYREG_PERI_MS_PPU_FX17_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020C44UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020C50UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020C54UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020C58UL)
#define CYREG_PERI_MS_PPU_FX17_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020C5CUL)
#define CYREG_PERI_MS_PPU_FX17_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020C60UL)
#define CYREG_PERI_MS_PPU_FX17_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020C64UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020C70UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020C74UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020C78UL)
#define CYREG_PERI_MS_PPU_FX17_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX18)
  */
#define CYREG_PERI_MS_PPU_FX18_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020C80UL)
#define CYREG_PERI_MS_PPU_FX18_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020C84UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020C90UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020C94UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020C98UL)
#define CYREG_PERI_MS_PPU_FX18_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020C9CUL)
#define CYREG_PERI_MS_PPU_FX18_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020CA0UL)
#define CYREG_PERI_MS_PPU_FX18_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020CA4UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020CB0UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020CB4UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020CB8UL)
#define CYREG_PERI_MS_PPU_FX18_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX19)
  */
#define CYREG_PERI_MS_PPU_FX19_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020CC0UL)
#define CYREG_PERI_MS_PPU_FX19_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020CC4UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020CD0UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020CD4UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020CD8UL)
#define CYREG_PERI_MS_PPU_FX19_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020CDCUL)
#define CYREG_PERI_MS_PPU_FX19_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020CE0UL)
#define CYREG_PERI_MS_PPU_FX19_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020CE4UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020CF0UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020CF4UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020CF8UL)
#define CYREG_PERI_MS_PPU_FX19_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX20)
  */
#define CYREG_PERI_MS_PPU_FX20_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020D00UL)
#define CYREG_PERI_MS_PPU_FX20_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020D04UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020D10UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020D14UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020D18UL)
#define CYREG_PERI_MS_PPU_FX20_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020D1CUL)
#define CYREG_PERI_MS_PPU_FX20_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020D20UL)
#define CYREG_PERI_MS_PPU_FX20_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020D24UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020D30UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020D34UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020D38UL)
#define CYREG_PERI_MS_PPU_FX20_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX21)
  */
#define CYREG_PERI_MS_PPU_FX21_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020D40UL)
#define CYREG_PERI_MS_PPU_FX21_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020D44UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020D50UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020D54UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020D58UL)
#define CYREG_PERI_MS_PPU_FX21_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020D5CUL)
#define CYREG_PERI_MS_PPU_FX21_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020D60UL)
#define CYREG_PERI_MS_PPU_FX21_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020D64UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020D70UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020D74UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020D78UL)
#define CYREG_PERI_MS_PPU_FX21_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX22)
  */
#define CYREG_PERI_MS_PPU_FX22_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020D80UL)
#define CYREG_PERI_MS_PPU_FX22_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020D84UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020D90UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020D94UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020D98UL)
#define CYREG_PERI_MS_PPU_FX22_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020D9CUL)
#define CYREG_PERI_MS_PPU_FX22_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020DA0UL)
#define CYREG_PERI_MS_PPU_FX22_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020DA4UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020DB0UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020DB4UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020DB8UL)
#define CYREG_PERI_MS_PPU_FX22_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX23)
  */
#define CYREG_PERI_MS_PPU_FX23_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020DC0UL)
#define CYREG_PERI_MS_PPU_FX23_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020DC4UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020DD0UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020DD4UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020DD8UL)
#define CYREG_PERI_MS_PPU_FX23_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020DDCUL)
#define CYREG_PERI_MS_PPU_FX23_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020DE0UL)
#define CYREG_PERI_MS_PPU_FX23_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020DE4UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020DF0UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020DF4UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020DF8UL)
#define CYREG_PERI_MS_PPU_FX23_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX24)
  */
#define CYREG_PERI_MS_PPU_FX24_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020E00UL)
#define CYREG_PERI_MS_PPU_FX24_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020E04UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020E10UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020E14UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020E18UL)
#define CYREG_PERI_MS_PPU_FX24_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020E1CUL)
#define CYREG_PERI_MS_PPU_FX24_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020E20UL)
#define CYREG_PERI_MS_PPU_FX24_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020E24UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020E30UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020E34UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020E38UL)
#define CYREG_PERI_MS_PPU_FX24_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX25)
  */
#define CYREG_PERI_MS_PPU_FX25_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020E40UL)
#define CYREG_PERI_MS_PPU_FX25_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020E44UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020E50UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020E54UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020E58UL)
#define CYREG_PERI_MS_PPU_FX25_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020E5CUL)
#define CYREG_PERI_MS_PPU_FX25_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020E60UL)
#define CYREG_PERI_MS_PPU_FX25_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020E64UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020E70UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020E74UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020E78UL)
#define CYREG_PERI_MS_PPU_FX25_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX26)
  */
#define CYREG_PERI_MS_PPU_FX26_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020E80UL)
#define CYREG_PERI_MS_PPU_FX26_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020E84UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020E90UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020E94UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020E98UL)
#define CYREG_PERI_MS_PPU_FX26_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020E9CUL)
#define CYREG_PERI_MS_PPU_FX26_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020EA0UL)
#define CYREG_PERI_MS_PPU_FX26_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020EA4UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020EB0UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020EB4UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020EB8UL)
#define CYREG_PERI_MS_PPU_FX26_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX27)
  */
#define CYREG_PERI_MS_PPU_FX27_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020EC0UL)
#define CYREG_PERI_MS_PPU_FX27_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020EC4UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020ED0UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020ED4UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020ED8UL)
#define CYREG_PERI_MS_PPU_FX27_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020EDCUL)
#define CYREG_PERI_MS_PPU_FX27_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020EE0UL)
#define CYREG_PERI_MS_PPU_FX27_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020EE4UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020EF0UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020EF4UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020EF8UL)
#define CYREG_PERI_MS_PPU_FX27_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX28)
  */
#define CYREG_PERI_MS_PPU_FX28_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020F00UL)
#define CYREG_PERI_MS_PPU_FX28_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020F04UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020F10UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020F14UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020F18UL)
#define CYREG_PERI_MS_PPU_FX28_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020F1CUL)
#define CYREG_PERI_MS_PPU_FX28_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020F20UL)
#define CYREG_PERI_MS_PPU_FX28_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020F24UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020F30UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020F34UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020F38UL)
#define CYREG_PERI_MS_PPU_FX28_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX29)
  */
#define CYREG_PERI_MS_PPU_FX29_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020F40UL)
#define CYREG_PERI_MS_PPU_FX29_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020F44UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020F50UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020F54UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020F58UL)
#define CYREG_PERI_MS_PPU_FX29_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020F5CUL)
#define CYREG_PERI_MS_PPU_FX29_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020F60UL)
#define CYREG_PERI_MS_PPU_FX29_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020F64UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020F70UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020F74UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020F78UL)
#define CYREG_PERI_MS_PPU_FX29_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX30)
  */
#define CYREG_PERI_MS_PPU_FX30_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020F80UL)
#define CYREG_PERI_MS_PPU_FX30_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020F84UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020F90UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020F94UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020F98UL)
#define CYREG_PERI_MS_PPU_FX30_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020F9CUL)
#define CYREG_PERI_MS_PPU_FX30_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020FA0UL)
#define CYREG_PERI_MS_PPU_FX30_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020FA4UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020FB0UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020FB4UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020FB8UL)
#define CYREG_PERI_MS_PPU_FX30_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX31)
  */
#define CYREG_PERI_MS_PPU_FX31_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40020FC0UL)
#define CYREG_PERI_MS_PPU_FX31_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40020FC4UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40020FD0UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40020FD4UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40020FD8UL)
#define CYREG_PERI_MS_PPU_FX31_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40020FDCUL)
#define CYREG_PERI_MS_PPU_FX31_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40020FE0UL)
#define CYREG_PERI_MS_PPU_FX31_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40020FE4UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40020FF0UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40020FF4UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40020FF8UL)
#define CYREG_PERI_MS_PPU_FX31_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40020FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX32)
  */
#define CYREG_PERI_MS_PPU_FX32_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021000UL)
#define CYREG_PERI_MS_PPU_FX32_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021004UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021010UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021014UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021018UL)
#define CYREG_PERI_MS_PPU_FX32_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002101CUL)
#define CYREG_PERI_MS_PPU_FX32_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021020UL)
#define CYREG_PERI_MS_PPU_FX32_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021024UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021030UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021034UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021038UL)
#define CYREG_PERI_MS_PPU_FX32_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002103CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX33)
  */
#define CYREG_PERI_MS_PPU_FX33_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021040UL)
#define CYREG_PERI_MS_PPU_FX33_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021044UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021050UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021054UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021058UL)
#define CYREG_PERI_MS_PPU_FX33_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002105CUL)
#define CYREG_PERI_MS_PPU_FX33_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021060UL)
#define CYREG_PERI_MS_PPU_FX33_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021064UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021070UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021074UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021078UL)
#define CYREG_PERI_MS_PPU_FX33_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002107CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX34)
  */
#define CYREG_PERI_MS_PPU_FX34_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021080UL)
#define CYREG_PERI_MS_PPU_FX34_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021084UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021090UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021094UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021098UL)
#define CYREG_PERI_MS_PPU_FX34_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002109CUL)
#define CYREG_PERI_MS_PPU_FX34_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400210A0UL)
#define CYREG_PERI_MS_PPU_FX34_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400210A4UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400210B0UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400210B4UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400210B8UL)
#define CYREG_PERI_MS_PPU_FX34_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400210BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX35)
  */
#define CYREG_PERI_MS_PPU_FX35_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400210C0UL)
#define CYREG_PERI_MS_PPU_FX35_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400210C4UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400210D0UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400210D4UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400210D8UL)
#define CYREG_PERI_MS_PPU_FX35_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400210DCUL)
#define CYREG_PERI_MS_PPU_FX35_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400210E0UL)
#define CYREG_PERI_MS_PPU_FX35_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400210E4UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400210F0UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400210F4UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400210F8UL)
#define CYREG_PERI_MS_PPU_FX35_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400210FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX36)
  */
#define CYREG_PERI_MS_PPU_FX36_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021100UL)
#define CYREG_PERI_MS_PPU_FX36_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021104UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021110UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021114UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021118UL)
#define CYREG_PERI_MS_PPU_FX36_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002111CUL)
#define CYREG_PERI_MS_PPU_FX36_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021120UL)
#define CYREG_PERI_MS_PPU_FX36_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021124UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021130UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021134UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021138UL)
#define CYREG_PERI_MS_PPU_FX36_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002113CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX37)
  */
#define CYREG_PERI_MS_PPU_FX37_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021140UL)
#define CYREG_PERI_MS_PPU_FX37_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021144UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021150UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021154UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021158UL)
#define CYREG_PERI_MS_PPU_FX37_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002115CUL)
#define CYREG_PERI_MS_PPU_FX37_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021160UL)
#define CYREG_PERI_MS_PPU_FX37_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021164UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021170UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021174UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021178UL)
#define CYREG_PERI_MS_PPU_FX37_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002117CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX38)
  */
#define CYREG_PERI_MS_PPU_FX38_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021180UL)
#define CYREG_PERI_MS_PPU_FX38_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021184UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021190UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021194UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021198UL)
#define CYREG_PERI_MS_PPU_FX38_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002119CUL)
#define CYREG_PERI_MS_PPU_FX38_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400211A0UL)
#define CYREG_PERI_MS_PPU_FX38_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400211A4UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400211B0UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400211B4UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400211B8UL)
#define CYREG_PERI_MS_PPU_FX38_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400211BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX39)
  */
#define CYREG_PERI_MS_PPU_FX39_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400211C0UL)
#define CYREG_PERI_MS_PPU_FX39_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400211C4UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400211D0UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400211D4UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400211D8UL)
#define CYREG_PERI_MS_PPU_FX39_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400211DCUL)
#define CYREG_PERI_MS_PPU_FX39_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400211E0UL)
#define CYREG_PERI_MS_PPU_FX39_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400211E4UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400211F0UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400211F4UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400211F8UL)
#define CYREG_PERI_MS_PPU_FX39_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400211FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX40)
  */
#define CYREG_PERI_MS_PPU_FX40_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021200UL)
#define CYREG_PERI_MS_PPU_FX40_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021204UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021210UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021214UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021218UL)
#define CYREG_PERI_MS_PPU_FX40_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002121CUL)
#define CYREG_PERI_MS_PPU_FX40_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021220UL)
#define CYREG_PERI_MS_PPU_FX40_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021224UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021230UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021234UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021238UL)
#define CYREG_PERI_MS_PPU_FX40_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002123CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX41)
  */
#define CYREG_PERI_MS_PPU_FX41_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021240UL)
#define CYREG_PERI_MS_PPU_FX41_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021244UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021250UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021254UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021258UL)
#define CYREG_PERI_MS_PPU_FX41_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002125CUL)
#define CYREG_PERI_MS_PPU_FX41_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021260UL)
#define CYREG_PERI_MS_PPU_FX41_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021264UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021270UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021274UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021278UL)
#define CYREG_PERI_MS_PPU_FX41_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002127CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX42)
  */
#define CYREG_PERI_MS_PPU_FX42_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021280UL)
#define CYREG_PERI_MS_PPU_FX42_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021284UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021290UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021294UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021298UL)
#define CYREG_PERI_MS_PPU_FX42_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002129CUL)
#define CYREG_PERI_MS_PPU_FX42_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400212A0UL)
#define CYREG_PERI_MS_PPU_FX42_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400212A4UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400212B0UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400212B4UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400212B8UL)
#define CYREG_PERI_MS_PPU_FX42_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400212BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX43)
  */
#define CYREG_PERI_MS_PPU_FX43_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400212C0UL)
#define CYREG_PERI_MS_PPU_FX43_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400212C4UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400212D0UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400212D4UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400212D8UL)
#define CYREG_PERI_MS_PPU_FX43_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400212DCUL)
#define CYREG_PERI_MS_PPU_FX43_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400212E0UL)
#define CYREG_PERI_MS_PPU_FX43_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400212E4UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400212F0UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400212F4UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400212F8UL)
#define CYREG_PERI_MS_PPU_FX43_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400212FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX44)
  */
#define CYREG_PERI_MS_PPU_FX44_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021300UL)
#define CYREG_PERI_MS_PPU_FX44_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021304UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021310UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021314UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021318UL)
#define CYREG_PERI_MS_PPU_FX44_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002131CUL)
#define CYREG_PERI_MS_PPU_FX44_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021320UL)
#define CYREG_PERI_MS_PPU_FX44_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021324UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021330UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021334UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021338UL)
#define CYREG_PERI_MS_PPU_FX44_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002133CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX45)
  */
#define CYREG_PERI_MS_PPU_FX45_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021340UL)
#define CYREG_PERI_MS_PPU_FX45_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021344UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021350UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021354UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021358UL)
#define CYREG_PERI_MS_PPU_FX45_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002135CUL)
#define CYREG_PERI_MS_PPU_FX45_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021360UL)
#define CYREG_PERI_MS_PPU_FX45_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021364UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021370UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021374UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021378UL)
#define CYREG_PERI_MS_PPU_FX45_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002137CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX46)
  */
#define CYREG_PERI_MS_PPU_FX46_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021380UL)
#define CYREG_PERI_MS_PPU_FX46_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021384UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021390UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021394UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021398UL)
#define CYREG_PERI_MS_PPU_FX46_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002139CUL)
#define CYREG_PERI_MS_PPU_FX46_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400213A0UL)
#define CYREG_PERI_MS_PPU_FX46_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400213A4UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400213B0UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400213B4UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400213B8UL)
#define CYREG_PERI_MS_PPU_FX46_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400213BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX47)
  */
#define CYREG_PERI_MS_PPU_FX47_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400213C0UL)
#define CYREG_PERI_MS_PPU_FX47_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400213C4UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400213D0UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400213D4UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400213D8UL)
#define CYREG_PERI_MS_PPU_FX47_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400213DCUL)
#define CYREG_PERI_MS_PPU_FX47_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400213E0UL)
#define CYREG_PERI_MS_PPU_FX47_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400213E4UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400213F0UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400213F4UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400213F8UL)
#define CYREG_PERI_MS_PPU_FX47_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400213FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX48)
  */
#define CYREG_PERI_MS_PPU_FX48_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021400UL)
#define CYREG_PERI_MS_PPU_FX48_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021404UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021410UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021414UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021418UL)
#define CYREG_PERI_MS_PPU_FX48_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002141CUL)
#define CYREG_PERI_MS_PPU_FX48_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021420UL)
#define CYREG_PERI_MS_PPU_FX48_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021424UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021430UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021434UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021438UL)
#define CYREG_PERI_MS_PPU_FX48_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002143CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX49)
  */
#define CYREG_PERI_MS_PPU_FX49_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021440UL)
#define CYREG_PERI_MS_PPU_FX49_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021444UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021450UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021454UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021458UL)
#define CYREG_PERI_MS_PPU_FX49_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002145CUL)
#define CYREG_PERI_MS_PPU_FX49_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021460UL)
#define CYREG_PERI_MS_PPU_FX49_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021464UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021470UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021474UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021478UL)
#define CYREG_PERI_MS_PPU_FX49_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002147CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX50)
  */
#define CYREG_PERI_MS_PPU_FX50_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021480UL)
#define CYREG_PERI_MS_PPU_FX50_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021484UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021490UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021494UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021498UL)
#define CYREG_PERI_MS_PPU_FX50_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002149CUL)
#define CYREG_PERI_MS_PPU_FX50_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400214A0UL)
#define CYREG_PERI_MS_PPU_FX50_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400214A4UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400214B0UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400214B4UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400214B8UL)
#define CYREG_PERI_MS_PPU_FX50_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400214BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX51)
  */
#define CYREG_PERI_MS_PPU_FX51_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400214C0UL)
#define CYREG_PERI_MS_PPU_FX51_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400214C4UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400214D0UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400214D4UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400214D8UL)
#define CYREG_PERI_MS_PPU_FX51_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400214DCUL)
#define CYREG_PERI_MS_PPU_FX51_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400214E0UL)
#define CYREG_PERI_MS_PPU_FX51_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400214E4UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400214F0UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400214F4UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400214F8UL)
#define CYREG_PERI_MS_PPU_FX51_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400214FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX52)
  */
#define CYREG_PERI_MS_PPU_FX52_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021500UL)
#define CYREG_PERI_MS_PPU_FX52_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021504UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021510UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021514UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021518UL)
#define CYREG_PERI_MS_PPU_FX52_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002151CUL)
#define CYREG_PERI_MS_PPU_FX52_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021520UL)
#define CYREG_PERI_MS_PPU_FX52_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021524UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021530UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021534UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021538UL)
#define CYREG_PERI_MS_PPU_FX52_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002153CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX53)
  */
#define CYREG_PERI_MS_PPU_FX53_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021540UL)
#define CYREG_PERI_MS_PPU_FX53_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021544UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021550UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021554UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021558UL)
#define CYREG_PERI_MS_PPU_FX53_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002155CUL)
#define CYREG_PERI_MS_PPU_FX53_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021560UL)
#define CYREG_PERI_MS_PPU_FX53_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021564UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021570UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021574UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021578UL)
#define CYREG_PERI_MS_PPU_FX53_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002157CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX54)
  */
#define CYREG_PERI_MS_PPU_FX54_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021580UL)
#define CYREG_PERI_MS_PPU_FX54_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021584UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021590UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021594UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021598UL)
#define CYREG_PERI_MS_PPU_FX54_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002159CUL)
#define CYREG_PERI_MS_PPU_FX54_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400215A0UL)
#define CYREG_PERI_MS_PPU_FX54_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400215A4UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400215B0UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400215B4UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400215B8UL)
#define CYREG_PERI_MS_PPU_FX54_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400215BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX55)
  */
#define CYREG_PERI_MS_PPU_FX55_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400215C0UL)
#define CYREG_PERI_MS_PPU_FX55_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400215C4UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400215D0UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400215D4UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400215D8UL)
#define CYREG_PERI_MS_PPU_FX55_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400215DCUL)
#define CYREG_PERI_MS_PPU_FX55_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400215E0UL)
#define CYREG_PERI_MS_PPU_FX55_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400215E4UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400215F0UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400215F4UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400215F8UL)
#define CYREG_PERI_MS_PPU_FX55_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400215FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX56)
  */
#define CYREG_PERI_MS_PPU_FX56_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021600UL)
#define CYREG_PERI_MS_PPU_FX56_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021604UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021610UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021614UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021618UL)
#define CYREG_PERI_MS_PPU_FX56_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002161CUL)
#define CYREG_PERI_MS_PPU_FX56_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021620UL)
#define CYREG_PERI_MS_PPU_FX56_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021624UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021630UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021634UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021638UL)
#define CYREG_PERI_MS_PPU_FX56_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002163CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX57)
  */
#define CYREG_PERI_MS_PPU_FX57_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021640UL)
#define CYREG_PERI_MS_PPU_FX57_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021644UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021650UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021654UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021658UL)
#define CYREG_PERI_MS_PPU_FX57_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002165CUL)
#define CYREG_PERI_MS_PPU_FX57_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021660UL)
#define CYREG_PERI_MS_PPU_FX57_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021664UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021670UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021674UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021678UL)
#define CYREG_PERI_MS_PPU_FX57_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002167CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX58)
  */
#define CYREG_PERI_MS_PPU_FX58_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021680UL)
#define CYREG_PERI_MS_PPU_FX58_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021684UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021690UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021694UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021698UL)
#define CYREG_PERI_MS_PPU_FX58_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002169CUL)
#define CYREG_PERI_MS_PPU_FX58_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400216A0UL)
#define CYREG_PERI_MS_PPU_FX58_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400216A4UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400216B0UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400216B4UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400216B8UL)
#define CYREG_PERI_MS_PPU_FX58_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400216BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX59)
  */
#define CYREG_PERI_MS_PPU_FX59_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400216C0UL)
#define CYREG_PERI_MS_PPU_FX59_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400216C4UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400216D0UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400216D4UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400216D8UL)
#define CYREG_PERI_MS_PPU_FX59_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400216DCUL)
#define CYREG_PERI_MS_PPU_FX59_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400216E0UL)
#define CYREG_PERI_MS_PPU_FX59_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400216E4UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400216F0UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400216F4UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400216F8UL)
#define CYREG_PERI_MS_PPU_FX59_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400216FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX60)
  */
#define CYREG_PERI_MS_PPU_FX60_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021700UL)
#define CYREG_PERI_MS_PPU_FX60_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021704UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021710UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021714UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021718UL)
#define CYREG_PERI_MS_PPU_FX60_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002171CUL)
#define CYREG_PERI_MS_PPU_FX60_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021720UL)
#define CYREG_PERI_MS_PPU_FX60_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021724UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021730UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021734UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021738UL)
#define CYREG_PERI_MS_PPU_FX60_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002173CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX61)
  */
#define CYREG_PERI_MS_PPU_FX61_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021740UL)
#define CYREG_PERI_MS_PPU_FX61_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021744UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021750UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021754UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021758UL)
#define CYREG_PERI_MS_PPU_FX61_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002175CUL)
#define CYREG_PERI_MS_PPU_FX61_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021760UL)
#define CYREG_PERI_MS_PPU_FX61_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021764UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021770UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021774UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021778UL)
#define CYREG_PERI_MS_PPU_FX61_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002177CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX62)
  */
#define CYREG_PERI_MS_PPU_FX62_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021780UL)
#define CYREG_PERI_MS_PPU_FX62_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021784UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021790UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021794UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021798UL)
#define CYREG_PERI_MS_PPU_FX62_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002179CUL)
#define CYREG_PERI_MS_PPU_FX62_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400217A0UL)
#define CYREG_PERI_MS_PPU_FX62_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400217A4UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400217B0UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400217B4UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400217B8UL)
#define CYREG_PERI_MS_PPU_FX62_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400217BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX63)
  */
#define CYREG_PERI_MS_PPU_FX63_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400217C0UL)
#define CYREG_PERI_MS_PPU_FX63_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400217C4UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400217D0UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400217D4UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400217D8UL)
#define CYREG_PERI_MS_PPU_FX63_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400217DCUL)
#define CYREG_PERI_MS_PPU_FX63_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400217E0UL)
#define CYREG_PERI_MS_PPU_FX63_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400217E4UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400217F0UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400217F4UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400217F8UL)
#define CYREG_PERI_MS_PPU_FX63_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400217FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX64)
  */
#define CYREG_PERI_MS_PPU_FX64_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021800UL)
#define CYREG_PERI_MS_PPU_FX64_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021804UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021810UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021814UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021818UL)
#define CYREG_PERI_MS_PPU_FX64_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002181CUL)
#define CYREG_PERI_MS_PPU_FX64_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021820UL)
#define CYREG_PERI_MS_PPU_FX64_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021824UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021830UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021834UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021838UL)
#define CYREG_PERI_MS_PPU_FX64_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002183CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX65)
  */
#define CYREG_PERI_MS_PPU_FX65_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021840UL)
#define CYREG_PERI_MS_PPU_FX65_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021844UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021850UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021854UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021858UL)
#define CYREG_PERI_MS_PPU_FX65_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002185CUL)
#define CYREG_PERI_MS_PPU_FX65_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021860UL)
#define CYREG_PERI_MS_PPU_FX65_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021864UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021870UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021874UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021878UL)
#define CYREG_PERI_MS_PPU_FX65_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002187CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX66)
  */
#define CYREG_PERI_MS_PPU_FX66_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021880UL)
#define CYREG_PERI_MS_PPU_FX66_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021884UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021890UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021894UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021898UL)
#define CYREG_PERI_MS_PPU_FX66_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002189CUL)
#define CYREG_PERI_MS_PPU_FX66_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400218A0UL)
#define CYREG_PERI_MS_PPU_FX66_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400218A4UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400218B0UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400218B4UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400218B8UL)
#define CYREG_PERI_MS_PPU_FX66_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400218BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX67)
  */
#define CYREG_PERI_MS_PPU_FX67_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400218C0UL)
#define CYREG_PERI_MS_PPU_FX67_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400218C4UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400218D0UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400218D4UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400218D8UL)
#define CYREG_PERI_MS_PPU_FX67_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400218DCUL)
#define CYREG_PERI_MS_PPU_FX67_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400218E0UL)
#define CYREG_PERI_MS_PPU_FX67_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400218E4UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400218F0UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400218F4UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400218F8UL)
#define CYREG_PERI_MS_PPU_FX67_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400218FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX68)
  */
#define CYREG_PERI_MS_PPU_FX68_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021900UL)
#define CYREG_PERI_MS_PPU_FX68_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021904UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021910UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021914UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021918UL)
#define CYREG_PERI_MS_PPU_FX68_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002191CUL)
#define CYREG_PERI_MS_PPU_FX68_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021920UL)
#define CYREG_PERI_MS_PPU_FX68_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021924UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021930UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021934UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021938UL)
#define CYREG_PERI_MS_PPU_FX68_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002193CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX69)
  */
#define CYREG_PERI_MS_PPU_FX69_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021940UL)
#define CYREG_PERI_MS_PPU_FX69_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021944UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021950UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021954UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021958UL)
#define CYREG_PERI_MS_PPU_FX69_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002195CUL)
#define CYREG_PERI_MS_PPU_FX69_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021960UL)
#define CYREG_PERI_MS_PPU_FX69_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021964UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021970UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021974UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021978UL)
#define CYREG_PERI_MS_PPU_FX69_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002197CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX70)
  */
#define CYREG_PERI_MS_PPU_FX70_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021980UL)
#define CYREG_PERI_MS_PPU_FX70_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021984UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021990UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021994UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021998UL)
#define CYREG_PERI_MS_PPU_FX70_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002199CUL)
#define CYREG_PERI_MS_PPU_FX70_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400219A0UL)
#define CYREG_PERI_MS_PPU_FX70_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400219A4UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400219B0UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400219B4UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400219B8UL)
#define CYREG_PERI_MS_PPU_FX70_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400219BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX71)
  */
#define CYREG_PERI_MS_PPU_FX71_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400219C0UL)
#define CYREG_PERI_MS_PPU_FX71_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400219C4UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400219D0UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400219D4UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400219D8UL)
#define CYREG_PERI_MS_PPU_FX71_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400219DCUL)
#define CYREG_PERI_MS_PPU_FX71_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400219E0UL)
#define CYREG_PERI_MS_PPU_FX71_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400219E4UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400219F0UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400219F4UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400219F8UL)
#define CYREG_PERI_MS_PPU_FX71_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400219FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX72)
  */
#define CYREG_PERI_MS_PPU_FX72_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021A00UL)
#define CYREG_PERI_MS_PPU_FX72_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021A04UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021A10UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021A14UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021A18UL)
#define CYREG_PERI_MS_PPU_FX72_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021A1CUL)
#define CYREG_PERI_MS_PPU_FX72_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021A20UL)
#define CYREG_PERI_MS_PPU_FX72_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021A24UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021A30UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021A34UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021A38UL)
#define CYREG_PERI_MS_PPU_FX72_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX73)
  */
#define CYREG_PERI_MS_PPU_FX73_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021A40UL)
#define CYREG_PERI_MS_PPU_FX73_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021A44UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021A50UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021A54UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021A58UL)
#define CYREG_PERI_MS_PPU_FX73_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021A5CUL)
#define CYREG_PERI_MS_PPU_FX73_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021A60UL)
#define CYREG_PERI_MS_PPU_FX73_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021A64UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021A70UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021A74UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021A78UL)
#define CYREG_PERI_MS_PPU_FX73_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX74)
  */
#define CYREG_PERI_MS_PPU_FX74_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021A80UL)
#define CYREG_PERI_MS_PPU_FX74_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021A84UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021A90UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021A94UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021A98UL)
#define CYREG_PERI_MS_PPU_FX74_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021A9CUL)
#define CYREG_PERI_MS_PPU_FX74_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021AA0UL)
#define CYREG_PERI_MS_PPU_FX74_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021AA4UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021AB0UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021AB4UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021AB8UL)
#define CYREG_PERI_MS_PPU_FX74_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX75)
  */
#define CYREG_PERI_MS_PPU_FX75_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021AC0UL)
#define CYREG_PERI_MS_PPU_FX75_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021AC4UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021AD0UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021AD4UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021AD8UL)
#define CYREG_PERI_MS_PPU_FX75_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021ADCUL)
#define CYREG_PERI_MS_PPU_FX75_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021AE0UL)
#define CYREG_PERI_MS_PPU_FX75_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021AE4UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021AF0UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021AF4UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021AF8UL)
#define CYREG_PERI_MS_PPU_FX75_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX76)
  */
#define CYREG_PERI_MS_PPU_FX76_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021B00UL)
#define CYREG_PERI_MS_PPU_FX76_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021B04UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021B10UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021B14UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021B18UL)
#define CYREG_PERI_MS_PPU_FX76_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021B1CUL)
#define CYREG_PERI_MS_PPU_FX76_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021B20UL)
#define CYREG_PERI_MS_PPU_FX76_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021B24UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021B30UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021B34UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021B38UL)
#define CYREG_PERI_MS_PPU_FX76_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX77)
  */
#define CYREG_PERI_MS_PPU_FX77_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021B40UL)
#define CYREG_PERI_MS_PPU_FX77_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021B44UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021B50UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021B54UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021B58UL)
#define CYREG_PERI_MS_PPU_FX77_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021B5CUL)
#define CYREG_PERI_MS_PPU_FX77_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021B60UL)
#define CYREG_PERI_MS_PPU_FX77_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021B64UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021B70UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021B74UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021B78UL)
#define CYREG_PERI_MS_PPU_FX77_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX78)
  */
#define CYREG_PERI_MS_PPU_FX78_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021B80UL)
#define CYREG_PERI_MS_PPU_FX78_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021B84UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021B90UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021B94UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021B98UL)
#define CYREG_PERI_MS_PPU_FX78_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021B9CUL)
#define CYREG_PERI_MS_PPU_FX78_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021BA0UL)
#define CYREG_PERI_MS_PPU_FX78_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021BA4UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021BB0UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021BB4UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021BB8UL)
#define CYREG_PERI_MS_PPU_FX78_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX79)
  */
#define CYREG_PERI_MS_PPU_FX79_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021BC0UL)
#define CYREG_PERI_MS_PPU_FX79_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021BC4UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021BD0UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021BD4UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021BD8UL)
#define CYREG_PERI_MS_PPU_FX79_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021BDCUL)
#define CYREG_PERI_MS_PPU_FX79_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021BE0UL)
#define CYREG_PERI_MS_PPU_FX79_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021BE4UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021BF0UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021BF4UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021BF8UL)
#define CYREG_PERI_MS_PPU_FX79_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX80)
  */
#define CYREG_PERI_MS_PPU_FX80_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021C00UL)
#define CYREG_PERI_MS_PPU_FX80_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021C04UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021C10UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021C14UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021C18UL)
#define CYREG_PERI_MS_PPU_FX80_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021C1CUL)
#define CYREG_PERI_MS_PPU_FX80_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021C20UL)
#define CYREG_PERI_MS_PPU_FX80_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021C24UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021C30UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021C34UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021C38UL)
#define CYREG_PERI_MS_PPU_FX80_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX81)
  */
#define CYREG_PERI_MS_PPU_FX81_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021C40UL)
#define CYREG_PERI_MS_PPU_FX81_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021C44UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021C50UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021C54UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021C58UL)
#define CYREG_PERI_MS_PPU_FX81_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021C5CUL)
#define CYREG_PERI_MS_PPU_FX81_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021C60UL)
#define CYREG_PERI_MS_PPU_FX81_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021C64UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021C70UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021C74UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021C78UL)
#define CYREG_PERI_MS_PPU_FX81_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX82)
  */
#define CYREG_PERI_MS_PPU_FX82_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021C80UL)
#define CYREG_PERI_MS_PPU_FX82_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021C84UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021C90UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021C94UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021C98UL)
#define CYREG_PERI_MS_PPU_FX82_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021C9CUL)
#define CYREG_PERI_MS_PPU_FX82_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021CA0UL)
#define CYREG_PERI_MS_PPU_FX82_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021CA4UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021CB0UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021CB4UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021CB8UL)
#define CYREG_PERI_MS_PPU_FX82_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX83)
  */
#define CYREG_PERI_MS_PPU_FX83_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021CC0UL)
#define CYREG_PERI_MS_PPU_FX83_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021CC4UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021CD0UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021CD4UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021CD8UL)
#define CYREG_PERI_MS_PPU_FX83_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021CDCUL)
#define CYREG_PERI_MS_PPU_FX83_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021CE0UL)
#define CYREG_PERI_MS_PPU_FX83_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021CE4UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021CF0UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021CF4UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021CF8UL)
#define CYREG_PERI_MS_PPU_FX83_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX84)
  */
#define CYREG_PERI_MS_PPU_FX84_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021D00UL)
#define CYREG_PERI_MS_PPU_FX84_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021D04UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021D10UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021D14UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021D18UL)
#define CYREG_PERI_MS_PPU_FX84_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021D1CUL)
#define CYREG_PERI_MS_PPU_FX84_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021D20UL)
#define CYREG_PERI_MS_PPU_FX84_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021D24UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021D30UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021D34UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021D38UL)
#define CYREG_PERI_MS_PPU_FX84_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX85)
  */
#define CYREG_PERI_MS_PPU_FX85_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021D40UL)
#define CYREG_PERI_MS_PPU_FX85_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021D44UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021D50UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021D54UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021D58UL)
#define CYREG_PERI_MS_PPU_FX85_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021D5CUL)
#define CYREG_PERI_MS_PPU_FX85_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021D60UL)
#define CYREG_PERI_MS_PPU_FX85_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021D64UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021D70UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021D74UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021D78UL)
#define CYREG_PERI_MS_PPU_FX85_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX86)
  */
#define CYREG_PERI_MS_PPU_FX86_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021D80UL)
#define CYREG_PERI_MS_PPU_FX86_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021D84UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021D90UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021D94UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021D98UL)
#define CYREG_PERI_MS_PPU_FX86_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021D9CUL)
#define CYREG_PERI_MS_PPU_FX86_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021DA0UL)
#define CYREG_PERI_MS_PPU_FX86_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021DA4UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021DB0UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021DB4UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021DB8UL)
#define CYREG_PERI_MS_PPU_FX86_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX87)
  */
#define CYREG_PERI_MS_PPU_FX87_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021DC0UL)
#define CYREG_PERI_MS_PPU_FX87_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021DC4UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021DD0UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021DD4UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021DD8UL)
#define CYREG_PERI_MS_PPU_FX87_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021DDCUL)
#define CYREG_PERI_MS_PPU_FX87_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021DE0UL)
#define CYREG_PERI_MS_PPU_FX87_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021DE4UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021DF0UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021DF4UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021DF8UL)
#define CYREG_PERI_MS_PPU_FX87_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX88)
  */
#define CYREG_PERI_MS_PPU_FX88_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021E00UL)
#define CYREG_PERI_MS_PPU_FX88_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021E04UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021E10UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021E14UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021E18UL)
#define CYREG_PERI_MS_PPU_FX88_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021E1CUL)
#define CYREG_PERI_MS_PPU_FX88_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021E20UL)
#define CYREG_PERI_MS_PPU_FX88_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021E24UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021E30UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021E34UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021E38UL)
#define CYREG_PERI_MS_PPU_FX88_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX89)
  */
#define CYREG_PERI_MS_PPU_FX89_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021E40UL)
#define CYREG_PERI_MS_PPU_FX89_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021E44UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021E50UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021E54UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021E58UL)
#define CYREG_PERI_MS_PPU_FX89_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021E5CUL)
#define CYREG_PERI_MS_PPU_FX89_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021E60UL)
#define CYREG_PERI_MS_PPU_FX89_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021E64UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021E70UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021E74UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021E78UL)
#define CYREG_PERI_MS_PPU_FX89_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX90)
  */
#define CYREG_PERI_MS_PPU_FX90_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021E80UL)
#define CYREG_PERI_MS_PPU_FX90_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021E84UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021E90UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021E94UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021E98UL)
#define CYREG_PERI_MS_PPU_FX90_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021E9CUL)
#define CYREG_PERI_MS_PPU_FX90_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021EA0UL)
#define CYREG_PERI_MS_PPU_FX90_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021EA4UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021EB0UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021EB4UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021EB8UL)
#define CYREG_PERI_MS_PPU_FX90_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX91)
  */
#define CYREG_PERI_MS_PPU_FX91_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021EC0UL)
#define CYREG_PERI_MS_PPU_FX91_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021EC4UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021ED0UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021ED4UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021ED8UL)
#define CYREG_PERI_MS_PPU_FX91_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021EDCUL)
#define CYREG_PERI_MS_PPU_FX91_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021EE0UL)
#define CYREG_PERI_MS_PPU_FX91_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021EE4UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021EF0UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021EF4UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021EF8UL)
#define CYREG_PERI_MS_PPU_FX91_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX92)
  */
#define CYREG_PERI_MS_PPU_FX92_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021F00UL)
#define CYREG_PERI_MS_PPU_FX92_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021F04UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021F10UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021F14UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021F18UL)
#define CYREG_PERI_MS_PPU_FX92_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021F1CUL)
#define CYREG_PERI_MS_PPU_FX92_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021F20UL)
#define CYREG_PERI_MS_PPU_FX92_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021F24UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021F30UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021F34UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021F38UL)
#define CYREG_PERI_MS_PPU_FX92_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX93)
  */
#define CYREG_PERI_MS_PPU_FX93_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021F40UL)
#define CYREG_PERI_MS_PPU_FX93_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021F44UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021F50UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021F54UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021F58UL)
#define CYREG_PERI_MS_PPU_FX93_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021F5CUL)
#define CYREG_PERI_MS_PPU_FX93_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021F60UL)
#define CYREG_PERI_MS_PPU_FX93_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021F64UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021F70UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021F74UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021F78UL)
#define CYREG_PERI_MS_PPU_FX93_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX94)
  */
#define CYREG_PERI_MS_PPU_FX94_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021F80UL)
#define CYREG_PERI_MS_PPU_FX94_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021F84UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021F90UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021F94UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021F98UL)
#define CYREG_PERI_MS_PPU_FX94_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021F9CUL)
#define CYREG_PERI_MS_PPU_FX94_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021FA0UL)
#define CYREG_PERI_MS_PPU_FX94_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021FA4UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021FB0UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021FB4UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021FB8UL)
#define CYREG_PERI_MS_PPU_FX94_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX95)
  */
#define CYREG_PERI_MS_PPU_FX95_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40021FC0UL)
#define CYREG_PERI_MS_PPU_FX95_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40021FC4UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40021FD0UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40021FD4UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40021FD8UL)
#define CYREG_PERI_MS_PPU_FX95_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40021FDCUL)
#define CYREG_PERI_MS_PPU_FX95_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40021FE0UL)
#define CYREG_PERI_MS_PPU_FX95_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40021FE4UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40021FF0UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40021FF4UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40021FF8UL)
#define CYREG_PERI_MS_PPU_FX95_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40021FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX96)
  */
#define CYREG_PERI_MS_PPU_FX96_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022000UL)
#define CYREG_PERI_MS_PPU_FX96_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022004UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022010UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022014UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022018UL)
#define CYREG_PERI_MS_PPU_FX96_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002201CUL)
#define CYREG_PERI_MS_PPU_FX96_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022020UL)
#define CYREG_PERI_MS_PPU_FX96_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022024UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022030UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022034UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022038UL)
#define CYREG_PERI_MS_PPU_FX96_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002203CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX97)
  */
#define CYREG_PERI_MS_PPU_FX97_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022040UL)
#define CYREG_PERI_MS_PPU_FX97_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022044UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022050UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022054UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022058UL)
#define CYREG_PERI_MS_PPU_FX97_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002205CUL)
#define CYREG_PERI_MS_PPU_FX97_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022060UL)
#define CYREG_PERI_MS_PPU_FX97_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022064UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022070UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022074UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022078UL)
#define CYREG_PERI_MS_PPU_FX97_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002207CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX98)
  */
#define CYREG_PERI_MS_PPU_FX98_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022080UL)
#define CYREG_PERI_MS_PPU_FX98_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022084UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022090UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022094UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022098UL)
#define CYREG_PERI_MS_PPU_FX98_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002209CUL)
#define CYREG_PERI_MS_PPU_FX98_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400220A0UL)
#define CYREG_PERI_MS_PPU_FX98_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400220A4UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400220B0UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400220B4UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400220B8UL)
#define CYREG_PERI_MS_PPU_FX98_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400220BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX99)
  */
#define CYREG_PERI_MS_PPU_FX99_SL_ADDR  ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400220C0UL)
#define CYREG_PERI_MS_PPU_FX99_SL_SIZE  ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400220C4UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT0  ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400220D0UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT1  ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400220D4UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT2  ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400220D8UL)
#define CYREG_PERI_MS_PPU_FX99_SL_ATT3  ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400220DCUL)
#define CYREG_PERI_MS_PPU_FX99_MS_ADDR  ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400220E0UL)
#define CYREG_PERI_MS_PPU_FX99_MS_SIZE  ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400220E4UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT0  ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400220F0UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT1  ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400220F4UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT2  ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400220F8UL)
#define CYREG_PERI_MS_PPU_FX99_MS_ATT3  ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400220FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX100)
  */
#define CYREG_PERI_MS_PPU_FX100_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022100UL)
#define CYREG_PERI_MS_PPU_FX100_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022104UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022110UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022114UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022118UL)
#define CYREG_PERI_MS_PPU_FX100_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002211CUL)
#define CYREG_PERI_MS_PPU_FX100_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022120UL)
#define CYREG_PERI_MS_PPU_FX100_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022124UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022130UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022134UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022138UL)
#define CYREG_PERI_MS_PPU_FX100_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002213CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX101)
  */
#define CYREG_PERI_MS_PPU_FX101_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022140UL)
#define CYREG_PERI_MS_PPU_FX101_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022144UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022150UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022154UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022158UL)
#define CYREG_PERI_MS_PPU_FX101_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002215CUL)
#define CYREG_PERI_MS_PPU_FX101_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022160UL)
#define CYREG_PERI_MS_PPU_FX101_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022164UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022170UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022174UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022178UL)
#define CYREG_PERI_MS_PPU_FX101_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002217CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX102)
  */
#define CYREG_PERI_MS_PPU_FX102_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022180UL)
#define CYREG_PERI_MS_PPU_FX102_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022184UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022190UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022194UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022198UL)
#define CYREG_PERI_MS_PPU_FX102_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002219CUL)
#define CYREG_PERI_MS_PPU_FX102_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400221A0UL)
#define CYREG_PERI_MS_PPU_FX102_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400221A4UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400221B0UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400221B4UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400221B8UL)
#define CYREG_PERI_MS_PPU_FX102_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400221BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX103)
  */
#define CYREG_PERI_MS_PPU_FX103_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400221C0UL)
#define CYREG_PERI_MS_PPU_FX103_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400221C4UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400221D0UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400221D4UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400221D8UL)
#define CYREG_PERI_MS_PPU_FX103_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400221DCUL)
#define CYREG_PERI_MS_PPU_FX103_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400221E0UL)
#define CYREG_PERI_MS_PPU_FX103_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400221E4UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400221F0UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400221F4UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400221F8UL)
#define CYREG_PERI_MS_PPU_FX103_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400221FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX104)
  */
#define CYREG_PERI_MS_PPU_FX104_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022200UL)
#define CYREG_PERI_MS_PPU_FX104_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022204UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022210UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022214UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022218UL)
#define CYREG_PERI_MS_PPU_FX104_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002221CUL)
#define CYREG_PERI_MS_PPU_FX104_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022220UL)
#define CYREG_PERI_MS_PPU_FX104_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022224UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022230UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022234UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022238UL)
#define CYREG_PERI_MS_PPU_FX104_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002223CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX105)
  */
#define CYREG_PERI_MS_PPU_FX105_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022240UL)
#define CYREG_PERI_MS_PPU_FX105_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022244UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022250UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022254UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022258UL)
#define CYREG_PERI_MS_PPU_FX105_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002225CUL)
#define CYREG_PERI_MS_PPU_FX105_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022260UL)
#define CYREG_PERI_MS_PPU_FX105_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022264UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022270UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022274UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022278UL)
#define CYREG_PERI_MS_PPU_FX105_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002227CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX106)
  */
#define CYREG_PERI_MS_PPU_FX106_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022280UL)
#define CYREG_PERI_MS_PPU_FX106_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022284UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022290UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022294UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022298UL)
#define CYREG_PERI_MS_PPU_FX106_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002229CUL)
#define CYREG_PERI_MS_PPU_FX106_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400222A0UL)
#define CYREG_PERI_MS_PPU_FX106_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400222A4UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400222B0UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400222B4UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400222B8UL)
#define CYREG_PERI_MS_PPU_FX106_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400222BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX107)
  */
#define CYREG_PERI_MS_PPU_FX107_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400222C0UL)
#define CYREG_PERI_MS_PPU_FX107_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400222C4UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400222D0UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400222D4UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400222D8UL)
#define CYREG_PERI_MS_PPU_FX107_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400222DCUL)
#define CYREG_PERI_MS_PPU_FX107_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400222E0UL)
#define CYREG_PERI_MS_PPU_FX107_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400222E4UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400222F0UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400222F4UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400222F8UL)
#define CYREG_PERI_MS_PPU_FX107_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400222FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX108)
  */
#define CYREG_PERI_MS_PPU_FX108_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022300UL)
#define CYREG_PERI_MS_PPU_FX108_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022304UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022310UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022314UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022318UL)
#define CYREG_PERI_MS_PPU_FX108_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002231CUL)
#define CYREG_PERI_MS_PPU_FX108_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022320UL)
#define CYREG_PERI_MS_PPU_FX108_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022324UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022330UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022334UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022338UL)
#define CYREG_PERI_MS_PPU_FX108_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002233CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX109)
  */
#define CYREG_PERI_MS_PPU_FX109_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022340UL)
#define CYREG_PERI_MS_PPU_FX109_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022344UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022350UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022354UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022358UL)
#define CYREG_PERI_MS_PPU_FX109_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002235CUL)
#define CYREG_PERI_MS_PPU_FX109_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022360UL)
#define CYREG_PERI_MS_PPU_FX109_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022364UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022370UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022374UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022378UL)
#define CYREG_PERI_MS_PPU_FX109_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002237CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX110)
  */
#define CYREG_PERI_MS_PPU_FX110_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022380UL)
#define CYREG_PERI_MS_PPU_FX110_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022384UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022390UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022394UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022398UL)
#define CYREG_PERI_MS_PPU_FX110_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002239CUL)
#define CYREG_PERI_MS_PPU_FX110_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400223A0UL)
#define CYREG_PERI_MS_PPU_FX110_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400223A4UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400223B0UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400223B4UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400223B8UL)
#define CYREG_PERI_MS_PPU_FX110_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400223BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX111)
  */
#define CYREG_PERI_MS_PPU_FX111_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400223C0UL)
#define CYREG_PERI_MS_PPU_FX111_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400223C4UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400223D0UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400223D4UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400223D8UL)
#define CYREG_PERI_MS_PPU_FX111_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400223DCUL)
#define CYREG_PERI_MS_PPU_FX111_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400223E0UL)
#define CYREG_PERI_MS_PPU_FX111_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400223E4UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400223F0UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400223F4UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400223F8UL)
#define CYREG_PERI_MS_PPU_FX111_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400223FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX112)
  */
#define CYREG_PERI_MS_PPU_FX112_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022400UL)
#define CYREG_PERI_MS_PPU_FX112_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022404UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022410UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022414UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022418UL)
#define CYREG_PERI_MS_PPU_FX112_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002241CUL)
#define CYREG_PERI_MS_PPU_FX112_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022420UL)
#define CYREG_PERI_MS_PPU_FX112_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022424UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022430UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022434UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022438UL)
#define CYREG_PERI_MS_PPU_FX112_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002243CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX113)
  */
#define CYREG_PERI_MS_PPU_FX113_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022440UL)
#define CYREG_PERI_MS_PPU_FX113_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022444UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022450UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022454UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022458UL)
#define CYREG_PERI_MS_PPU_FX113_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002245CUL)
#define CYREG_PERI_MS_PPU_FX113_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022460UL)
#define CYREG_PERI_MS_PPU_FX113_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022464UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022470UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022474UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022478UL)
#define CYREG_PERI_MS_PPU_FX113_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002247CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX114)
  */
#define CYREG_PERI_MS_PPU_FX114_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022480UL)
#define CYREG_PERI_MS_PPU_FX114_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022484UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022490UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022494UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022498UL)
#define CYREG_PERI_MS_PPU_FX114_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002249CUL)
#define CYREG_PERI_MS_PPU_FX114_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400224A0UL)
#define CYREG_PERI_MS_PPU_FX114_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400224A4UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400224B0UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400224B4UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400224B8UL)
#define CYREG_PERI_MS_PPU_FX114_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400224BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX115)
  */
#define CYREG_PERI_MS_PPU_FX115_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400224C0UL)
#define CYREG_PERI_MS_PPU_FX115_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400224C4UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400224D0UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400224D4UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400224D8UL)
#define CYREG_PERI_MS_PPU_FX115_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400224DCUL)
#define CYREG_PERI_MS_PPU_FX115_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400224E0UL)
#define CYREG_PERI_MS_PPU_FX115_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400224E4UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400224F0UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400224F4UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400224F8UL)
#define CYREG_PERI_MS_PPU_FX115_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400224FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX116)
  */
#define CYREG_PERI_MS_PPU_FX116_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022500UL)
#define CYREG_PERI_MS_PPU_FX116_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022504UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022510UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022514UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022518UL)
#define CYREG_PERI_MS_PPU_FX116_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002251CUL)
#define CYREG_PERI_MS_PPU_FX116_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022520UL)
#define CYREG_PERI_MS_PPU_FX116_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022524UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022530UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022534UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022538UL)
#define CYREG_PERI_MS_PPU_FX116_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002253CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX117)
  */
#define CYREG_PERI_MS_PPU_FX117_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022540UL)
#define CYREG_PERI_MS_PPU_FX117_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022544UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022550UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022554UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022558UL)
#define CYREG_PERI_MS_PPU_FX117_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002255CUL)
#define CYREG_PERI_MS_PPU_FX117_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022560UL)
#define CYREG_PERI_MS_PPU_FX117_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022564UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022570UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022574UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022578UL)
#define CYREG_PERI_MS_PPU_FX117_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002257CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX118)
  */
#define CYREG_PERI_MS_PPU_FX118_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022580UL)
#define CYREG_PERI_MS_PPU_FX118_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022584UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022590UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022594UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022598UL)
#define CYREG_PERI_MS_PPU_FX118_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002259CUL)
#define CYREG_PERI_MS_PPU_FX118_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400225A0UL)
#define CYREG_PERI_MS_PPU_FX118_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400225A4UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400225B0UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400225B4UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400225B8UL)
#define CYREG_PERI_MS_PPU_FX118_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400225BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX119)
  */
#define CYREG_PERI_MS_PPU_FX119_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400225C0UL)
#define CYREG_PERI_MS_PPU_FX119_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400225C4UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400225D0UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400225D4UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400225D8UL)
#define CYREG_PERI_MS_PPU_FX119_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400225DCUL)
#define CYREG_PERI_MS_PPU_FX119_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400225E0UL)
#define CYREG_PERI_MS_PPU_FX119_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400225E4UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400225F0UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400225F4UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400225F8UL)
#define CYREG_PERI_MS_PPU_FX119_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400225FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX120)
  */
#define CYREG_PERI_MS_PPU_FX120_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022600UL)
#define CYREG_PERI_MS_PPU_FX120_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022604UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022610UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022614UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022618UL)
#define CYREG_PERI_MS_PPU_FX120_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002261CUL)
#define CYREG_PERI_MS_PPU_FX120_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022620UL)
#define CYREG_PERI_MS_PPU_FX120_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022624UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022630UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022634UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022638UL)
#define CYREG_PERI_MS_PPU_FX120_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002263CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX121)
  */
#define CYREG_PERI_MS_PPU_FX121_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022640UL)
#define CYREG_PERI_MS_PPU_FX121_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022644UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022650UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022654UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022658UL)
#define CYREG_PERI_MS_PPU_FX121_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002265CUL)
#define CYREG_PERI_MS_PPU_FX121_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022660UL)
#define CYREG_PERI_MS_PPU_FX121_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022664UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022670UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022674UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022678UL)
#define CYREG_PERI_MS_PPU_FX121_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002267CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX122)
  */
#define CYREG_PERI_MS_PPU_FX122_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022680UL)
#define CYREG_PERI_MS_PPU_FX122_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022684UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022690UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022694UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022698UL)
#define CYREG_PERI_MS_PPU_FX122_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002269CUL)
#define CYREG_PERI_MS_PPU_FX122_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400226A0UL)
#define CYREG_PERI_MS_PPU_FX122_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400226A4UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400226B0UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400226B4UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400226B8UL)
#define CYREG_PERI_MS_PPU_FX122_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400226BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX123)
  */
#define CYREG_PERI_MS_PPU_FX123_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400226C0UL)
#define CYREG_PERI_MS_PPU_FX123_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400226C4UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400226D0UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400226D4UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400226D8UL)
#define CYREG_PERI_MS_PPU_FX123_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400226DCUL)
#define CYREG_PERI_MS_PPU_FX123_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400226E0UL)
#define CYREG_PERI_MS_PPU_FX123_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400226E4UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400226F0UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400226F4UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400226F8UL)
#define CYREG_PERI_MS_PPU_FX123_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400226FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX124)
  */
#define CYREG_PERI_MS_PPU_FX124_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022700UL)
#define CYREG_PERI_MS_PPU_FX124_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022704UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022710UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022714UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022718UL)
#define CYREG_PERI_MS_PPU_FX124_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002271CUL)
#define CYREG_PERI_MS_PPU_FX124_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022720UL)
#define CYREG_PERI_MS_PPU_FX124_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022724UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022730UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022734UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022738UL)
#define CYREG_PERI_MS_PPU_FX124_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002273CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX125)
  */
#define CYREG_PERI_MS_PPU_FX125_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022740UL)
#define CYREG_PERI_MS_PPU_FX125_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022744UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022750UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022754UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022758UL)
#define CYREG_PERI_MS_PPU_FX125_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002275CUL)
#define CYREG_PERI_MS_PPU_FX125_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022760UL)
#define CYREG_PERI_MS_PPU_FX125_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022764UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022770UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022774UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022778UL)
#define CYREG_PERI_MS_PPU_FX125_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002277CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX126)
  */
#define CYREG_PERI_MS_PPU_FX126_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022780UL)
#define CYREG_PERI_MS_PPU_FX126_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022784UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022790UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022794UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022798UL)
#define CYREG_PERI_MS_PPU_FX126_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002279CUL)
#define CYREG_PERI_MS_PPU_FX126_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400227A0UL)
#define CYREG_PERI_MS_PPU_FX126_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400227A4UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400227B0UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400227B4UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400227B8UL)
#define CYREG_PERI_MS_PPU_FX126_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400227BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX127)
  */
#define CYREG_PERI_MS_PPU_FX127_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400227C0UL)
#define CYREG_PERI_MS_PPU_FX127_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400227C4UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400227D0UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400227D4UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400227D8UL)
#define CYREG_PERI_MS_PPU_FX127_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400227DCUL)
#define CYREG_PERI_MS_PPU_FX127_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400227E0UL)
#define CYREG_PERI_MS_PPU_FX127_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400227E4UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400227F0UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400227F4UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400227F8UL)
#define CYREG_PERI_MS_PPU_FX127_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400227FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX128)
  */
#define CYREG_PERI_MS_PPU_FX128_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022800UL)
#define CYREG_PERI_MS_PPU_FX128_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022804UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022810UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022814UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022818UL)
#define CYREG_PERI_MS_PPU_FX128_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002281CUL)
#define CYREG_PERI_MS_PPU_FX128_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022820UL)
#define CYREG_PERI_MS_PPU_FX128_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022824UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022830UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022834UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022838UL)
#define CYREG_PERI_MS_PPU_FX128_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002283CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX129)
  */
#define CYREG_PERI_MS_PPU_FX129_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022840UL)
#define CYREG_PERI_MS_PPU_FX129_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022844UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022850UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022854UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022858UL)
#define CYREG_PERI_MS_PPU_FX129_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002285CUL)
#define CYREG_PERI_MS_PPU_FX129_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022860UL)
#define CYREG_PERI_MS_PPU_FX129_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022864UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022870UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022874UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022878UL)
#define CYREG_PERI_MS_PPU_FX129_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002287CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX130)
  */
#define CYREG_PERI_MS_PPU_FX130_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022880UL)
#define CYREG_PERI_MS_PPU_FX130_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022884UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022890UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022894UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022898UL)
#define CYREG_PERI_MS_PPU_FX130_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002289CUL)
#define CYREG_PERI_MS_PPU_FX130_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400228A0UL)
#define CYREG_PERI_MS_PPU_FX130_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400228A4UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400228B0UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400228B4UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400228B8UL)
#define CYREG_PERI_MS_PPU_FX130_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400228BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX131)
  */
#define CYREG_PERI_MS_PPU_FX131_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400228C0UL)
#define CYREG_PERI_MS_PPU_FX131_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400228C4UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400228D0UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400228D4UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400228D8UL)
#define CYREG_PERI_MS_PPU_FX131_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400228DCUL)
#define CYREG_PERI_MS_PPU_FX131_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400228E0UL)
#define CYREG_PERI_MS_PPU_FX131_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400228E4UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400228F0UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400228F4UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400228F8UL)
#define CYREG_PERI_MS_PPU_FX131_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400228FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX132)
  */
#define CYREG_PERI_MS_PPU_FX132_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022900UL)
#define CYREG_PERI_MS_PPU_FX132_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022904UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022910UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022914UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022918UL)
#define CYREG_PERI_MS_PPU_FX132_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002291CUL)
#define CYREG_PERI_MS_PPU_FX132_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022920UL)
#define CYREG_PERI_MS_PPU_FX132_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022924UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022930UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022934UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022938UL)
#define CYREG_PERI_MS_PPU_FX132_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002293CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX133)
  */
#define CYREG_PERI_MS_PPU_FX133_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022940UL)
#define CYREG_PERI_MS_PPU_FX133_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022944UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022950UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022954UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022958UL)
#define CYREG_PERI_MS_PPU_FX133_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002295CUL)
#define CYREG_PERI_MS_PPU_FX133_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022960UL)
#define CYREG_PERI_MS_PPU_FX133_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022964UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022970UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022974UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022978UL)
#define CYREG_PERI_MS_PPU_FX133_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002297CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX134)
  */
#define CYREG_PERI_MS_PPU_FX134_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022980UL)
#define CYREG_PERI_MS_PPU_FX134_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022984UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022990UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022994UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022998UL)
#define CYREG_PERI_MS_PPU_FX134_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002299CUL)
#define CYREG_PERI_MS_PPU_FX134_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400229A0UL)
#define CYREG_PERI_MS_PPU_FX134_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400229A4UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400229B0UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400229B4UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400229B8UL)
#define CYREG_PERI_MS_PPU_FX134_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400229BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX135)
  */
#define CYREG_PERI_MS_PPU_FX135_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400229C0UL)
#define CYREG_PERI_MS_PPU_FX135_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400229C4UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400229D0UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400229D4UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400229D8UL)
#define CYREG_PERI_MS_PPU_FX135_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400229DCUL)
#define CYREG_PERI_MS_PPU_FX135_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400229E0UL)
#define CYREG_PERI_MS_PPU_FX135_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400229E4UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400229F0UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400229F4UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400229F8UL)
#define CYREG_PERI_MS_PPU_FX135_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400229FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX136)
  */
#define CYREG_PERI_MS_PPU_FX136_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022A00UL)
#define CYREG_PERI_MS_PPU_FX136_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022A04UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022A10UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022A14UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022A18UL)
#define CYREG_PERI_MS_PPU_FX136_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022A1CUL)
#define CYREG_PERI_MS_PPU_FX136_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022A20UL)
#define CYREG_PERI_MS_PPU_FX136_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022A24UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022A30UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022A34UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022A38UL)
#define CYREG_PERI_MS_PPU_FX136_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX137)
  */
#define CYREG_PERI_MS_PPU_FX137_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022A40UL)
#define CYREG_PERI_MS_PPU_FX137_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022A44UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022A50UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022A54UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022A58UL)
#define CYREG_PERI_MS_PPU_FX137_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022A5CUL)
#define CYREG_PERI_MS_PPU_FX137_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022A60UL)
#define CYREG_PERI_MS_PPU_FX137_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022A64UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022A70UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022A74UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022A78UL)
#define CYREG_PERI_MS_PPU_FX137_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX138)
  */
#define CYREG_PERI_MS_PPU_FX138_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022A80UL)
#define CYREG_PERI_MS_PPU_FX138_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022A84UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022A90UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022A94UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022A98UL)
#define CYREG_PERI_MS_PPU_FX138_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022A9CUL)
#define CYREG_PERI_MS_PPU_FX138_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022AA0UL)
#define CYREG_PERI_MS_PPU_FX138_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022AA4UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022AB0UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022AB4UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022AB8UL)
#define CYREG_PERI_MS_PPU_FX138_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX139)
  */
#define CYREG_PERI_MS_PPU_FX139_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022AC0UL)
#define CYREG_PERI_MS_PPU_FX139_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022AC4UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022AD0UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022AD4UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022AD8UL)
#define CYREG_PERI_MS_PPU_FX139_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022ADCUL)
#define CYREG_PERI_MS_PPU_FX139_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022AE0UL)
#define CYREG_PERI_MS_PPU_FX139_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022AE4UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022AF0UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022AF4UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022AF8UL)
#define CYREG_PERI_MS_PPU_FX139_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX140)
  */
#define CYREG_PERI_MS_PPU_FX140_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022B00UL)
#define CYREG_PERI_MS_PPU_FX140_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022B04UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022B10UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022B14UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022B18UL)
#define CYREG_PERI_MS_PPU_FX140_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022B1CUL)
#define CYREG_PERI_MS_PPU_FX140_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022B20UL)
#define CYREG_PERI_MS_PPU_FX140_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022B24UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022B30UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022B34UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022B38UL)
#define CYREG_PERI_MS_PPU_FX140_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX141)
  */
#define CYREG_PERI_MS_PPU_FX141_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022B40UL)
#define CYREG_PERI_MS_PPU_FX141_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022B44UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022B50UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022B54UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022B58UL)
#define CYREG_PERI_MS_PPU_FX141_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022B5CUL)
#define CYREG_PERI_MS_PPU_FX141_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022B60UL)
#define CYREG_PERI_MS_PPU_FX141_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022B64UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022B70UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022B74UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022B78UL)
#define CYREG_PERI_MS_PPU_FX141_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX142)
  */
#define CYREG_PERI_MS_PPU_FX142_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022B80UL)
#define CYREG_PERI_MS_PPU_FX142_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022B84UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022B90UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022B94UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022B98UL)
#define CYREG_PERI_MS_PPU_FX142_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022B9CUL)
#define CYREG_PERI_MS_PPU_FX142_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022BA0UL)
#define CYREG_PERI_MS_PPU_FX142_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022BA4UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022BB0UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022BB4UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022BB8UL)
#define CYREG_PERI_MS_PPU_FX142_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX143)
  */
#define CYREG_PERI_MS_PPU_FX143_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022BC0UL)
#define CYREG_PERI_MS_PPU_FX143_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022BC4UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022BD0UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022BD4UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022BD8UL)
#define CYREG_PERI_MS_PPU_FX143_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022BDCUL)
#define CYREG_PERI_MS_PPU_FX143_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022BE0UL)
#define CYREG_PERI_MS_PPU_FX143_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022BE4UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022BF0UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022BF4UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022BF8UL)
#define CYREG_PERI_MS_PPU_FX143_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX144)
  */
#define CYREG_PERI_MS_PPU_FX144_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022C00UL)
#define CYREG_PERI_MS_PPU_FX144_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022C04UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022C10UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022C14UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022C18UL)
#define CYREG_PERI_MS_PPU_FX144_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022C1CUL)
#define CYREG_PERI_MS_PPU_FX144_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022C20UL)
#define CYREG_PERI_MS_PPU_FX144_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022C24UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022C30UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022C34UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022C38UL)
#define CYREG_PERI_MS_PPU_FX144_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX145)
  */
#define CYREG_PERI_MS_PPU_FX145_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022C40UL)
#define CYREG_PERI_MS_PPU_FX145_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022C44UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022C50UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022C54UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022C58UL)
#define CYREG_PERI_MS_PPU_FX145_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022C5CUL)
#define CYREG_PERI_MS_PPU_FX145_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022C60UL)
#define CYREG_PERI_MS_PPU_FX145_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022C64UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022C70UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022C74UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022C78UL)
#define CYREG_PERI_MS_PPU_FX145_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX146)
  */
#define CYREG_PERI_MS_PPU_FX146_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022C80UL)
#define CYREG_PERI_MS_PPU_FX146_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022C84UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022C90UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022C94UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022C98UL)
#define CYREG_PERI_MS_PPU_FX146_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022C9CUL)
#define CYREG_PERI_MS_PPU_FX146_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022CA0UL)
#define CYREG_PERI_MS_PPU_FX146_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022CA4UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022CB0UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022CB4UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022CB8UL)
#define CYREG_PERI_MS_PPU_FX146_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX147)
  */
#define CYREG_PERI_MS_PPU_FX147_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022CC0UL)
#define CYREG_PERI_MS_PPU_FX147_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022CC4UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022CD0UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022CD4UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022CD8UL)
#define CYREG_PERI_MS_PPU_FX147_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022CDCUL)
#define CYREG_PERI_MS_PPU_FX147_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022CE0UL)
#define CYREG_PERI_MS_PPU_FX147_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022CE4UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022CF0UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022CF4UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022CF8UL)
#define CYREG_PERI_MS_PPU_FX147_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX148)
  */
#define CYREG_PERI_MS_PPU_FX148_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022D00UL)
#define CYREG_PERI_MS_PPU_FX148_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022D04UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022D10UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022D14UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022D18UL)
#define CYREG_PERI_MS_PPU_FX148_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022D1CUL)
#define CYREG_PERI_MS_PPU_FX148_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022D20UL)
#define CYREG_PERI_MS_PPU_FX148_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022D24UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022D30UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022D34UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022D38UL)
#define CYREG_PERI_MS_PPU_FX148_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX149)
  */
#define CYREG_PERI_MS_PPU_FX149_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022D40UL)
#define CYREG_PERI_MS_PPU_FX149_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022D44UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022D50UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022D54UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022D58UL)
#define CYREG_PERI_MS_PPU_FX149_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022D5CUL)
#define CYREG_PERI_MS_PPU_FX149_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022D60UL)
#define CYREG_PERI_MS_PPU_FX149_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022D64UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022D70UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022D74UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022D78UL)
#define CYREG_PERI_MS_PPU_FX149_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX150)
  */
#define CYREG_PERI_MS_PPU_FX150_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022D80UL)
#define CYREG_PERI_MS_PPU_FX150_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022D84UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022D90UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022D94UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022D98UL)
#define CYREG_PERI_MS_PPU_FX150_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022D9CUL)
#define CYREG_PERI_MS_PPU_FX150_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022DA0UL)
#define CYREG_PERI_MS_PPU_FX150_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022DA4UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022DB0UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022DB4UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022DB8UL)
#define CYREG_PERI_MS_PPU_FX150_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX151)
  */
#define CYREG_PERI_MS_PPU_FX151_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022DC0UL)
#define CYREG_PERI_MS_PPU_FX151_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022DC4UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022DD0UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022DD4UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022DD8UL)
#define CYREG_PERI_MS_PPU_FX151_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022DDCUL)
#define CYREG_PERI_MS_PPU_FX151_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022DE0UL)
#define CYREG_PERI_MS_PPU_FX151_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022DE4UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022DF0UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022DF4UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022DF8UL)
#define CYREG_PERI_MS_PPU_FX151_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX152)
  */
#define CYREG_PERI_MS_PPU_FX152_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022E00UL)
#define CYREG_PERI_MS_PPU_FX152_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022E04UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022E10UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022E14UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022E18UL)
#define CYREG_PERI_MS_PPU_FX152_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022E1CUL)
#define CYREG_PERI_MS_PPU_FX152_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022E20UL)
#define CYREG_PERI_MS_PPU_FX152_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022E24UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022E30UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022E34UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022E38UL)
#define CYREG_PERI_MS_PPU_FX152_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX153)
  */
#define CYREG_PERI_MS_PPU_FX153_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022E40UL)
#define CYREG_PERI_MS_PPU_FX153_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022E44UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022E50UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022E54UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022E58UL)
#define CYREG_PERI_MS_PPU_FX153_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022E5CUL)
#define CYREG_PERI_MS_PPU_FX153_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022E60UL)
#define CYREG_PERI_MS_PPU_FX153_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022E64UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022E70UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022E74UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022E78UL)
#define CYREG_PERI_MS_PPU_FX153_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX154)
  */
#define CYREG_PERI_MS_PPU_FX154_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022E80UL)
#define CYREG_PERI_MS_PPU_FX154_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022E84UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022E90UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022E94UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022E98UL)
#define CYREG_PERI_MS_PPU_FX154_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022E9CUL)
#define CYREG_PERI_MS_PPU_FX154_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022EA0UL)
#define CYREG_PERI_MS_PPU_FX154_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022EA4UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022EB0UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022EB4UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022EB8UL)
#define CYREG_PERI_MS_PPU_FX154_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX155)
  */
#define CYREG_PERI_MS_PPU_FX155_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022EC0UL)
#define CYREG_PERI_MS_PPU_FX155_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022EC4UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022ED0UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022ED4UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022ED8UL)
#define CYREG_PERI_MS_PPU_FX155_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022EDCUL)
#define CYREG_PERI_MS_PPU_FX155_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022EE0UL)
#define CYREG_PERI_MS_PPU_FX155_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022EE4UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022EF0UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022EF4UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022EF8UL)
#define CYREG_PERI_MS_PPU_FX155_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX156)
  */
#define CYREG_PERI_MS_PPU_FX156_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022F00UL)
#define CYREG_PERI_MS_PPU_FX156_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022F04UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022F10UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022F14UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022F18UL)
#define CYREG_PERI_MS_PPU_FX156_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022F1CUL)
#define CYREG_PERI_MS_PPU_FX156_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022F20UL)
#define CYREG_PERI_MS_PPU_FX156_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022F24UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022F30UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022F34UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022F38UL)
#define CYREG_PERI_MS_PPU_FX156_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX157)
  */
#define CYREG_PERI_MS_PPU_FX157_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022F40UL)
#define CYREG_PERI_MS_PPU_FX157_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022F44UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022F50UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022F54UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022F58UL)
#define CYREG_PERI_MS_PPU_FX157_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022F5CUL)
#define CYREG_PERI_MS_PPU_FX157_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022F60UL)
#define CYREG_PERI_MS_PPU_FX157_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022F64UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022F70UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022F74UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022F78UL)
#define CYREG_PERI_MS_PPU_FX157_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX158)
  */
#define CYREG_PERI_MS_PPU_FX158_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022F80UL)
#define CYREG_PERI_MS_PPU_FX158_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022F84UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022F90UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022F94UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022F98UL)
#define CYREG_PERI_MS_PPU_FX158_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022F9CUL)
#define CYREG_PERI_MS_PPU_FX158_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022FA0UL)
#define CYREG_PERI_MS_PPU_FX158_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022FA4UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022FB0UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022FB4UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022FB8UL)
#define CYREG_PERI_MS_PPU_FX158_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX159)
  */
#define CYREG_PERI_MS_PPU_FX159_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40022FC0UL)
#define CYREG_PERI_MS_PPU_FX159_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40022FC4UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40022FD0UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40022FD4UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40022FD8UL)
#define CYREG_PERI_MS_PPU_FX159_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40022FDCUL)
#define CYREG_PERI_MS_PPU_FX159_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40022FE0UL)
#define CYREG_PERI_MS_PPU_FX159_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40022FE4UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40022FF0UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40022FF4UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40022FF8UL)
#define CYREG_PERI_MS_PPU_FX159_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40022FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX160)
  */
#define CYREG_PERI_MS_PPU_FX160_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023000UL)
#define CYREG_PERI_MS_PPU_FX160_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023004UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023010UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023014UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023018UL)
#define CYREG_PERI_MS_PPU_FX160_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002301CUL)
#define CYREG_PERI_MS_PPU_FX160_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023020UL)
#define CYREG_PERI_MS_PPU_FX160_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023024UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023030UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023034UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023038UL)
#define CYREG_PERI_MS_PPU_FX160_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002303CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX161)
  */
#define CYREG_PERI_MS_PPU_FX161_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023040UL)
#define CYREG_PERI_MS_PPU_FX161_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023044UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023050UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023054UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023058UL)
#define CYREG_PERI_MS_PPU_FX161_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002305CUL)
#define CYREG_PERI_MS_PPU_FX161_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023060UL)
#define CYREG_PERI_MS_PPU_FX161_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023064UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023070UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023074UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023078UL)
#define CYREG_PERI_MS_PPU_FX161_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002307CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX162)
  */
#define CYREG_PERI_MS_PPU_FX162_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023080UL)
#define CYREG_PERI_MS_PPU_FX162_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023084UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023090UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023094UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023098UL)
#define CYREG_PERI_MS_PPU_FX162_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002309CUL)
#define CYREG_PERI_MS_PPU_FX162_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400230A0UL)
#define CYREG_PERI_MS_PPU_FX162_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400230A4UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400230B0UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400230B4UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400230B8UL)
#define CYREG_PERI_MS_PPU_FX162_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400230BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX163)
  */
#define CYREG_PERI_MS_PPU_FX163_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400230C0UL)
#define CYREG_PERI_MS_PPU_FX163_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400230C4UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400230D0UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400230D4UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400230D8UL)
#define CYREG_PERI_MS_PPU_FX163_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400230DCUL)
#define CYREG_PERI_MS_PPU_FX163_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400230E0UL)
#define CYREG_PERI_MS_PPU_FX163_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400230E4UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400230F0UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400230F4UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400230F8UL)
#define CYREG_PERI_MS_PPU_FX163_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400230FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX164)
  */
#define CYREG_PERI_MS_PPU_FX164_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023100UL)
#define CYREG_PERI_MS_PPU_FX164_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023104UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023110UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023114UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023118UL)
#define CYREG_PERI_MS_PPU_FX164_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002311CUL)
#define CYREG_PERI_MS_PPU_FX164_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023120UL)
#define CYREG_PERI_MS_PPU_FX164_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023124UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023130UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023134UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023138UL)
#define CYREG_PERI_MS_PPU_FX164_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002313CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX165)
  */
#define CYREG_PERI_MS_PPU_FX165_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023140UL)
#define CYREG_PERI_MS_PPU_FX165_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023144UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023150UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023154UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023158UL)
#define CYREG_PERI_MS_PPU_FX165_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002315CUL)
#define CYREG_PERI_MS_PPU_FX165_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023160UL)
#define CYREG_PERI_MS_PPU_FX165_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023164UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023170UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023174UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023178UL)
#define CYREG_PERI_MS_PPU_FX165_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002317CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX166)
  */
#define CYREG_PERI_MS_PPU_FX166_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023180UL)
#define CYREG_PERI_MS_PPU_FX166_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023184UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023190UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023194UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023198UL)
#define CYREG_PERI_MS_PPU_FX166_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002319CUL)
#define CYREG_PERI_MS_PPU_FX166_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400231A0UL)
#define CYREG_PERI_MS_PPU_FX166_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400231A4UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400231B0UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400231B4UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400231B8UL)
#define CYREG_PERI_MS_PPU_FX166_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400231BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX167)
  */
#define CYREG_PERI_MS_PPU_FX167_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400231C0UL)
#define CYREG_PERI_MS_PPU_FX167_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400231C4UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400231D0UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400231D4UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400231D8UL)
#define CYREG_PERI_MS_PPU_FX167_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400231DCUL)
#define CYREG_PERI_MS_PPU_FX167_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400231E0UL)
#define CYREG_PERI_MS_PPU_FX167_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400231E4UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400231F0UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400231F4UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400231F8UL)
#define CYREG_PERI_MS_PPU_FX167_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400231FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX168)
  */
#define CYREG_PERI_MS_PPU_FX168_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023200UL)
#define CYREG_PERI_MS_PPU_FX168_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023204UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023210UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023214UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023218UL)
#define CYREG_PERI_MS_PPU_FX168_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002321CUL)
#define CYREG_PERI_MS_PPU_FX168_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023220UL)
#define CYREG_PERI_MS_PPU_FX168_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023224UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023230UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023234UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023238UL)
#define CYREG_PERI_MS_PPU_FX168_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002323CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX169)
  */
#define CYREG_PERI_MS_PPU_FX169_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023240UL)
#define CYREG_PERI_MS_PPU_FX169_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023244UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023250UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023254UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023258UL)
#define CYREG_PERI_MS_PPU_FX169_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002325CUL)
#define CYREG_PERI_MS_PPU_FX169_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023260UL)
#define CYREG_PERI_MS_PPU_FX169_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023264UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023270UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023274UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023278UL)
#define CYREG_PERI_MS_PPU_FX169_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002327CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX170)
  */
#define CYREG_PERI_MS_PPU_FX170_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023280UL)
#define CYREG_PERI_MS_PPU_FX170_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023284UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023290UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023294UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023298UL)
#define CYREG_PERI_MS_PPU_FX170_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002329CUL)
#define CYREG_PERI_MS_PPU_FX170_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400232A0UL)
#define CYREG_PERI_MS_PPU_FX170_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400232A4UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400232B0UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400232B4UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400232B8UL)
#define CYREG_PERI_MS_PPU_FX170_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400232BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX171)
  */
#define CYREG_PERI_MS_PPU_FX171_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400232C0UL)
#define CYREG_PERI_MS_PPU_FX171_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400232C4UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400232D0UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400232D4UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400232D8UL)
#define CYREG_PERI_MS_PPU_FX171_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400232DCUL)
#define CYREG_PERI_MS_PPU_FX171_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400232E0UL)
#define CYREG_PERI_MS_PPU_FX171_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400232E4UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400232F0UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400232F4UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400232F8UL)
#define CYREG_PERI_MS_PPU_FX171_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400232FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX172)
  */
#define CYREG_PERI_MS_PPU_FX172_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023300UL)
#define CYREG_PERI_MS_PPU_FX172_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023304UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023310UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023314UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023318UL)
#define CYREG_PERI_MS_PPU_FX172_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002331CUL)
#define CYREG_PERI_MS_PPU_FX172_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023320UL)
#define CYREG_PERI_MS_PPU_FX172_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023324UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023330UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023334UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023338UL)
#define CYREG_PERI_MS_PPU_FX172_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002333CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX173)
  */
#define CYREG_PERI_MS_PPU_FX173_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023340UL)
#define CYREG_PERI_MS_PPU_FX173_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023344UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023350UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023354UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023358UL)
#define CYREG_PERI_MS_PPU_FX173_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002335CUL)
#define CYREG_PERI_MS_PPU_FX173_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023360UL)
#define CYREG_PERI_MS_PPU_FX173_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023364UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023370UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023374UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023378UL)
#define CYREG_PERI_MS_PPU_FX173_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002337CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX174)
  */
#define CYREG_PERI_MS_PPU_FX174_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023380UL)
#define CYREG_PERI_MS_PPU_FX174_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023384UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023390UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023394UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023398UL)
#define CYREG_PERI_MS_PPU_FX174_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002339CUL)
#define CYREG_PERI_MS_PPU_FX174_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400233A0UL)
#define CYREG_PERI_MS_PPU_FX174_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400233A4UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400233B0UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400233B4UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400233B8UL)
#define CYREG_PERI_MS_PPU_FX174_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400233BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX175)
  */
#define CYREG_PERI_MS_PPU_FX175_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400233C0UL)
#define CYREG_PERI_MS_PPU_FX175_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400233C4UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400233D0UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400233D4UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400233D8UL)
#define CYREG_PERI_MS_PPU_FX175_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400233DCUL)
#define CYREG_PERI_MS_PPU_FX175_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400233E0UL)
#define CYREG_PERI_MS_PPU_FX175_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400233E4UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400233F0UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400233F4UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400233F8UL)
#define CYREG_PERI_MS_PPU_FX175_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400233FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX176)
  */
#define CYREG_PERI_MS_PPU_FX176_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023400UL)
#define CYREG_PERI_MS_PPU_FX176_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023404UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023410UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023414UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023418UL)
#define CYREG_PERI_MS_PPU_FX176_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002341CUL)
#define CYREG_PERI_MS_PPU_FX176_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023420UL)
#define CYREG_PERI_MS_PPU_FX176_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023424UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023430UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023434UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023438UL)
#define CYREG_PERI_MS_PPU_FX176_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002343CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX177)
  */
#define CYREG_PERI_MS_PPU_FX177_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023440UL)
#define CYREG_PERI_MS_PPU_FX177_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023444UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023450UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023454UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023458UL)
#define CYREG_PERI_MS_PPU_FX177_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002345CUL)
#define CYREG_PERI_MS_PPU_FX177_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023460UL)
#define CYREG_PERI_MS_PPU_FX177_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023464UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023470UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023474UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023478UL)
#define CYREG_PERI_MS_PPU_FX177_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002347CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX178)
  */
#define CYREG_PERI_MS_PPU_FX178_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023480UL)
#define CYREG_PERI_MS_PPU_FX178_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023484UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023490UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023494UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023498UL)
#define CYREG_PERI_MS_PPU_FX178_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002349CUL)
#define CYREG_PERI_MS_PPU_FX178_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400234A0UL)
#define CYREG_PERI_MS_PPU_FX178_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400234A4UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400234B0UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400234B4UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400234B8UL)
#define CYREG_PERI_MS_PPU_FX178_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400234BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX179)
  */
#define CYREG_PERI_MS_PPU_FX179_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400234C0UL)
#define CYREG_PERI_MS_PPU_FX179_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400234C4UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400234D0UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400234D4UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400234D8UL)
#define CYREG_PERI_MS_PPU_FX179_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400234DCUL)
#define CYREG_PERI_MS_PPU_FX179_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400234E0UL)
#define CYREG_PERI_MS_PPU_FX179_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400234E4UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400234F0UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400234F4UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400234F8UL)
#define CYREG_PERI_MS_PPU_FX179_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400234FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX180)
  */
#define CYREG_PERI_MS_PPU_FX180_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023500UL)
#define CYREG_PERI_MS_PPU_FX180_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023504UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023510UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023514UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023518UL)
#define CYREG_PERI_MS_PPU_FX180_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002351CUL)
#define CYREG_PERI_MS_PPU_FX180_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023520UL)
#define CYREG_PERI_MS_PPU_FX180_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023524UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023530UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023534UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023538UL)
#define CYREG_PERI_MS_PPU_FX180_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002353CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX181)
  */
#define CYREG_PERI_MS_PPU_FX181_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023540UL)
#define CYREG_PERI_MS_PPU_FX181_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023544UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023550UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023554UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023558UL)
#define CYREG_PERI_MS_PPU_FX181_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002355CUL)
#define CYREG_PERI_MS_PPU_FX181_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023560UL)
#define CYREG_PERI_MS_PPU_FX181_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023564UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023570UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023574UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023578UL)
#define CYREG_PERI_MS_PPU_FX181_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002357CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX182)
  */
#define CYREG_PERI_MS_PPU_FX182_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023580UL)
#define CYREG_PERI_MS_PPU_FX182_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023584UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023590UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023594UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023598UL)
#define CYREG_PERI_MS_PPU_FX182_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002359CUL)
#define CYREG_PERI_MS_PPU_FX182_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400235A0UL)
#define CYREG_PERI_MS_PPU_FX182_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400235A4UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400235B0UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400235B4UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400235B8UL)
#define CYREG_PERI_MS_PPU_FX182_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400235BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX183)
  */
#define CYREG_PERI_MS_PPU_FX183_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400235C0UL)
#define CYREG_PERI_MS_PPU_FX183_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400235C4UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400235D0UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400235D4UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400235D8UL)
#define CYREG_PERI_MS_PPU_FX183_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400235DCUL)
#define CYREG_PERI_MS_PPU_FX183_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400235E0UL)
#define CYREG_PERI_MS_PPU_FX183_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400235E4UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400235F0UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400235F4UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400235F8UL)
#define CYREG_PERI_MS_PPU_FX183_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400235FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX184)
  */
#define CYREG_PERI_MS_PPU_FX184_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023600UL)
#define CYREG_PERI_MS_PPU_FX184_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023604UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023610UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023614UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023618UL)
#define CYREG_PERI_MS_PPU_FX184_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002361CUL)
#define CYREG_PERI_MS_PPU_FX184_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023620UL)
#define CYREG_PERI_MS_PPU_FX184_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023624UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023630UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023634UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023638UL)
#define CYREG_PERI_MS_PPU_FX184_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002363CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX185)
  */
#define CYREG_PERI_MS_PPU_FX185_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023640UL)
#define CYREG_PERI_MS_PPU_FX185_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023644UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023650UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023654UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023658UL)
#define CYREG_PERI_MS_PPU_FX185_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002365CUL)
#define CYREG_PERI_MS_PPU_FX185_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023660UL)
#define CYREG_PERI_MS_PPU_FX185_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023664UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023670UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023674UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023678UL)
#define CYREG_PERI_MS_PPU_FX185_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002367CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX186)
  */
#define CYREG_PERI_MS_PPU_FX186_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023680UL)
#define CYREG_PERI_MS_PPU_FX186_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023684UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023690UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023694UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023698UL)
#define CYREG_PERI_MS_PPU_FX186_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002369CUL)
#define CYREG_PERI_MS_PPU_FX186_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400236A0UL)
#define CYREG_PERI_MS_PPU_FX186_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400236A4UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400236B0UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400236B4UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400236B8UL)
#define CYREG_PERI_MS_PPU_FX186_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400236BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX187)
  */
#define CYREG_PERI_MS_PPU_FX187_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400236C0UL)
#define CYREG_PERI_MS_PPU_FX187_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400236C4UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400236D0UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400236D4UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400236D8UL)
#define CYREG_PERI_MS_PPU_FX187_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400236DCUL)
#define CYREG_PERI_MS_PPU_FX187_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400236E0UL)
#define CYREG_PERI_MS_PPU_FX187_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400236E4UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400236F0UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400236F4UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400236F8UL)
#define CYREG_PERI_MS_PPU_FX187_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400236FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX188)
  */
#define CYREG_PERI_MS_PPU_FX188_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023700UL)
#define CYREG_PERI_MS_PPU_FX188_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023704UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023710UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023714UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023718UL)
#define CYREG_PERI_MS_PPU_FX188_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002371CUL)
#define CYREG_PERI_MS_PPU_FX188_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023720UL)
#define CYREG_PERI_MS_PPU_FX188_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023724UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023730UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023734UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023738UL)
#define CYREG_PERI_MS_PPU_FX188_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002373CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX189)
  */
#define CYREG_PERI_MS_PPU_FX189_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023740UL)
#define CYREG_PERI_MS_PPU_FX189_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023744UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023750UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023754UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023758UL)
#define CYREG_PERI_MS_PPU_FX189_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002375CUL)
#define CYREG_PERI_MS_PPU_FX189_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023760UL)
#define CYREG_PERI_MS_PPU_FX189_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023764UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023770UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023774UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023778UL)
#define CYREG_PERI_MS_PPU_FX189_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002377CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX190)
  */
#define CYREG_PERI_MS_PPU_FX190_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023780UL)
#define CYREG_PERI_MS_PPU_FX190_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023784UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023790UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023794UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023798UL)
#define CYREG_PERI_MS_PPU_FX190_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002379CUL)
#define CYREG_PERI_MS_PPU_FX190_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400237A0UL)
#define CYREG_PERI_MS_PPU_FX190_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400237A4UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400237B0UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400237B4UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400237B8UL)
#define CYREG_PERI_MS_PPU_FX190_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400237BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX191)
  */
#define CYREG_PERI_MS_PPU_FX191_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400237C0UL)
#define CYREG_PERI_MS_PPU_FX191_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400237C4UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400237D0UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400237D4UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400237D8UL)
#define CYREG_PERI_MS_PPU_FX191_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400237DCUL)
#define CYREG_PERI_MS_PPU_FX191_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400237E0UL)
#define CYREG_PERI_MS_PPU_FX191_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400237E4UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400237F0UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400237F4UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400237F8UL)
#define CYREG_PERI_MS_PPU_FX191_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400237FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX192)
  */
#define CYREG_PERI_MS_PPU_FX192_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023800UL)
#define CYREG_PERI_MS_PPU_FX192_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023804UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023810UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023814UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023818UL)
#define CYREG_PERI_MS_PPU_FX192_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002381CUL)
#define CYREG_PERI_MS_PPU_FX192_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023820UL)
#define CYREG_PERI_MS_PPU_FX192_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023824UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023830UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023834UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023838UL)
#define CYREG_PERI_MS_PPU_FX192_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002383CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX193)
  */
#define CYREG_PERI_MS_PPU_FX193_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023840UL)
#define CYREG_PERI_MS_PPU_FX193_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023844UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023850UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023854UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023858UL)
#define CYREG_PERI_MS_PPU_FX193_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002385CUL)
#define CYREG_PERI_MS_PPU_FX193_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023860UL)
#define CYREG_PERI_MS_PPU_FX193_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023864UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023870UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023874UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023878UL)
#define CYREG_PERI_MS_PPU_FX193_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002387CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX194)
  */
#define CYREG_PERI_MS_PPU_FX194_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023880UL)
#define CYREG_PERI_MS_PPU_FX194_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023884UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023890UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023894UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023898UL)
#define CYREG_PERI_MS_PPU_FX194_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002389CUL)
#define CYREG_PERI_MS_PPU_FX194_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400238A0UL)
#define CYREG_PERI_MS_PPU_FX194_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400238A4UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400238B0UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400238B4UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400238B8UL)
#define CYREG_PERI_MS_PPU_FX194_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400238BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX195)
  */
#define CYREG_PERI_MS_PPU_FX195_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400238C0UL)
#define CYREG_PERI_MS_PPU_FX195_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400238C4UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400238D0UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400238D4UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400238D8UL)
#define CYREG_PERI_MS_PPU_FX195_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400238DCUL)
#define CYREG_PERI_MS_PPU_FX195_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400238E0UL)
#define CYREG_PERI_MS_PPU_FX195_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400238E4UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400238F0UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400238F4UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400238F8UL)
#define CYREG_PERI_MS_PPU_FX195_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400238FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX196)
  */
#define CYREG_PERI_MS_PPU_FX196_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023900UL)
#define CYREG_PERI_MS_PPU_FX196_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023904UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023910UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023914UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023918UL)
#define CYREG_PERI_MS_PPU_FX196_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002391CUL)
#define CYREG_PERI_MS_PPU_FX196_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023920UL)
#define CYREG_PERI_MS_PPU_FX196_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023924UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023930UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023934UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023938UL)
#define CYREG_PERI_MS_PPU_FX196_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002393CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX197)
  */
#define CYREG_PERI_MS_PPU_FX197_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023940UL)
#define CYREG_PERI_MS_PPU_FX197_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023944UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023950UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023954UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023958UL)
#define CYREG_PERI_MS_PPU_FX197_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002395CUL)
#define CYREG_PERI_MS_PPU_FX197_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023960UL)
#define CYREG_PERI_MS_PPU_FX197_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023964UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023970UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023974UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023978UL)
#define CYREG_PERI_MS_PPU_FX197_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002397CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX198)
  */
#define CYREG_PERI_MS_PPU_FX198_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023980UL)
#define CYREG_PERI_MS_PPU_FX198_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023984UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023990UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023994UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023998UL)
#define CYREG_PERI_MS_PPU_FX198_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002399CUL)
#define CYREG_PERI_MS_PPU_FX198_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400239A0UL)
#define CYREG_PERI_MS_PPU_FX198_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400239A4UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400239B0UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400239B4UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400239B8UL)
#define CYREG_PERI_MS_PPU_FX198_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400239BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX199)
  */
#define CYREG_PERI_MS_PPU_FX199_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400239C0UL)
#define CYREG_PERI_MS_PPU_FX199_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400239C4UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400239D0UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400239D4UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400239D8UL)
#define CYREG_PERI_MS_PPU_FX199_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400239DCUL)
#define CYREG_PERI_MS_PPU_FX199_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400239E0UL)
#define CYREG_PERI_MS_PPU_FX199_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400239E4UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400239F0UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400239F4UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400239F8UL)
#define CYREG_PERI_MS_PPU_FX199_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400239FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX200)
  */
#define CYREG_PERI_MS_PPU_FX200_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023A00UL)
#define CYREG_PERI_MS_PPU_FX200_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023A04UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023A10UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023A14UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023A18UL)
#define CYREG_PERI_MS_PPU_FX200_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023A1CUL)
#define CYREG_PERI_MS_PPU_FX200_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023A20UL)
#define CYREG_PERI_MS_PPU_FX200_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023A24UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023A30UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023A34UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023A38UL)
#define CYREG_PERI_MS_PPU_FX200_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX201)
  */
#define CYREG_PERI_MS_PPU_FX201_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023A40UL)
#define CYREG_PERI_MS_PPU_FX201_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023A44UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023A50UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023A54UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023A58UL)
#define CYREG_PERI_MS_PPU_FX201_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023A5CUL)
#define CYREG_PERI_MS_PPU_FX201_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023A60UL)
#define CYREG_PERI_MS_PPU_FX201_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023A64UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023A70UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023A74UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023A78UL)
#define CYREG_PERI_MS_PPU_FX201_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX202)
  */
#define CYREG_PERI_MS_PPU_FX202_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023A80UL)
#define CYREG_PERI_MS_PPU_FX202_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023A84UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023A90UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023A94UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023A98UL)
#define CYREG_PERI_MS_PPU_FX202_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023A9CUL)
#define CYREG_PERI_MS_PPU_FX202_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023AA0UL)
#define CYREG_PERI_MS_PPU_FX202_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023AA4UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023AB0UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023AB4UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023AB8UL)
#define CYREG_PERI_MS_PPU_FX202_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX203)
  */
#define CYREG_PERI_MS_PPU_FX203_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023AC0UL)
#define CYREG_PERI_MS_PPU_FX203_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023AC4UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023AD0UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023AD4UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023AD8UL)
#define CYREG_PERI_MS_PPU_FX203_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023ADCUL)
#define CYREG_PERI_MS_PPU_FX203_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023AE0UL)
#define CYREG_PERI_MS_PPU_FX203_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023AE4UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023AF0UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023AF4UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023AF8UL)
#define CYREG_PERI_MS_PPU_FX203_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX204)
  */
#define CYREG_PERI_MS_PPU_FX204_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023B00UL)
#define CYREG_PERI_MS_PPU_FX204_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023B04UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023B10UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023B14UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023B18UL)
#define CYREG_PERI_MS_PPU_FX204_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023B1CUL)
#define CYREG_PERI_MS_PPU_FX204_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023B20UL)
#define CYREG_PERI_MS_PPU_FX204_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023B24UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023B30UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023B34UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023B38UL)
#define CYREG_PERI_MS_PPU_FX204_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX205)
  */
#define CYREG_PERI_MS_PPU_FX205_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023B40UL)
#define CYREG_PERI_MS_PPU_FX205_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023B44UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023B50UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023B54UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023B58UL)
#define CYREG_PERI_MS_PPU_FX205_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023B5CUL)
#define CYREG_PERI_MS_PPU_FX205_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023B60UL)
#define CYREG_PERI_MS_PPU_FX205_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023B64UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023B70UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023B74UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023B78UL)
#define CYREG_PERI_MS_PPU_FX205_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX206)
  */
#define CYREG_PERI_MS_PPU_FX206_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023B80UL)
#define CYREG_PERI_MS_PPU_FX206_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023B84UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023B90UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023B94UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023B98UL)
#define CYREG_PERI_MS_PPU_FX206_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023B9CUL)
#define CYREG_PERI_MS_PPU_FX206_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023BA0UL)
#define CYREG_PERI_MS_PPU_FX206_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023BA4UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023BB0UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023BB4UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023BB8UL)
#define CYREG_PERI_MS_PPU_FX206_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX207)
  */
#define CYREG_PERI_MS_PPU_FX207_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023BC0UL)
#define CYREG_PERI_MS_PPU_FX207_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023BC4UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023BD0UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023BD4UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023BD8UL)
#define CYREG_PERI_MS_PPU_FX207_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023BDCUL)
#define CYREG_PERI_MS_PPU_FX207_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023BE0UL)
#define CYREG_PERI_MS_PPU_FX207_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023BE4UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023BF0UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023BF4UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023BF8UL)
#define CYREG_PERI_MS_PPU_FX207_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX208)
  */
#define CYREG_PERI_MS_PPU_FX208_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023C00UL)
#define CYREG_PERI_MS_PPU_FX208_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023C04UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023C10UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023C14UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023C18UL)
#define CYREG_PERI_MS_PPU_FX208_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023C1CUL)
#define CYREG_PERI_MS_PPU_FX208_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023C20UL)
#define CYREG_PERI_MS_PPU_FX208_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023C24UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023C30UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023C34UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023C38UL)
#define CYREG_PERI_MS_PPU_FX208_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX209)
  */
#define CYREG_PERI_MS_PPU_FX209_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023C40UL)
#define CYREG_PERI_MS_PPU_FX209_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023C44UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023C50UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023C54UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023C58UL)
#define CYREG_PERI_MS_PPU_FX209_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023C5CUL)
#define CYREG_PERI_MS_PPU_FX209_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023C60UL)
#define CYREG_PERI_MS_PPU_FX209_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023C64UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023C70UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023C74UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023C78UL)
#define CYREG_PERI_MS_PPU_FX209_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX210)
  */
#define CYREG_PERI_MS_PPU_FX210_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023C80UL)
#define CYREG_PERI_MS_PPU_FX210_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023C84UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023C90UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023C94UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023C98UL)
#define CYREG_PERI_MS_PPU_FX210_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023C9CUL)
#define CYREG_PERI_MS_PPU_FX210_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023CA0UL)
#define CYREG_PERI_MS_PPU_FX210_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023CA4UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023CB0UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023CB4UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023CB8UL)
#define CYREG_PERI_MS_PPU_FX210_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX211)
  */
#define CYREG_PERI_MS_PPU_FX211_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023CC0UL)
#define CYREG_PERI_MS_PPU_FX211_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023CC4UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023CD0UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023CD4UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023CD8UL)
#define CYREG_PERI_MS_PPU_FX211_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023CDCUL)
#define CYREG_PERI_MS_PPU_FX211_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023CE0UL)
#define CYREG_PERI_MS_PPU_FX211_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023CE4UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023CF0UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023CF4UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023CF8UL)
#define CYREG_PERI_MS_PPU_FX211_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX212)
  */
#define CYREG_PERI_MS_PPU_FX212_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023D00UL)
#define CYREG_PERI_MS_PPU_FX212_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023D04UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023D10UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023D14UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023D18UL)
#define CYREG_PERI_MS_PPU_FX212_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023D1CUL)
#define CYREG_PERI_MS_PPU_FX212_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023D20UL)
#define CYREG_PERI_MS_PPU_FX212_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023D24UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023D30UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023D34UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023D38UL)
#define CYREG_PERI_MS_PPU_FX212_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX213)
  */
#define CYREG_PERI_MS_PPU_FX213_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023D40UL)
#define CYREG_PERI_MS_PPU_FX213_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023D44UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023D50UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023D54UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023D58UL)
#define CYREG_PERI_MS_PPU_FX213_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023D5CUL)
#define CYREG_PERI_MS_PPU_FX213_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023D60UL)
#define CYREG_PERI_MS_PPU_FX213_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023D64UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023D70UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023D74UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023D78UL)
#define CYREG_PERI_MS_PPU_FX213_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX214)
  */
#define CYREG_PERI_MS_PPU_FX214_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023D80UL)
#define CYREG_PERI_MS_PPU_FX214_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023D84UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023D90UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023D94UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023D98UL)
#define CYREG_PERI_MS_PPU_FX214_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023D9CUL)
#define CYREG_PERI_MS_PPU_FX214_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023DA0UL)
#define CYREG_PERI_MS_PPU_FX214_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023DA4UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023DB0UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023DB4UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023DB8UL)
#define CYREG_PERI_MS_PPU_FX214_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX215)
  */
#define CYREG_PERI_MS_PPU_FX215_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023DC0UL)
#define CYREG_PERI_MS_PPU_FX215_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023DC4UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023DD0UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023DD4UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023DD8UL)
#define CYREG_PERI_MS_PPU_FX215_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023DDCUL)
#define CYREG_PERI_MS_PPU_FX215_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023DE0UL)
#define CYREG_PERI_MS_PPU_FX215_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023DE4UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023DF0UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023DF4UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023DF8UL)
#define CYREG_PERI_MS_PPU_FX215_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX216)
  */
#define CYREG_PERI_MS_PPU_FX216_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023E00UL)
#define CYREG_PERI_MS_PPU_FX216_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023E04UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023E10UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023E14UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023E18UL)
#define CYREG_PERI_MS_PPU_FX216_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023E1CUL)
#define CYREG_PERI_MS_PPU_FX216_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023E20UL)
#define CYREG_PERI_MS_PPU_FX216_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023E24UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023E30UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023E34UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023E38UL)
#define CYREG_PERI_MS_PPU_FX216_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX217)
  */
#define CYREG_PERI_MS_PPU_FX217_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023E40UL)
#define CYREG_PERI_MS_PPU_FX217_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023E44UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023E50UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023E54UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023E58UL)
#define CYREG_PERI_MS_PPU_FX217_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023E5CUL)
#define CYREG_PERI_MS_PPU_FX217_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023E60UL)
#define CYREG_PERI_MS_PPU_FX217_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023E64UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023E70UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023E74UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023E78UL)
#define CYREG_PERI_MS_PPU_FX217_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX218)
  */
#define CYREG_PERI_MS_PPU_FX218_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023E80UL)
#define CYREG_PERI_MS_PPU_FX218_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023E84UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023E90UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023E94UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023E98UL)
#define CYREG_PERI_MS_PPU_FX218_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023E9CUL)
#define CYREG_PERI_MS_PPU_FX218_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023EA0UL)
#define CYREG_PERI_MS_PPU_FX218_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023EA4UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023EB0UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023EB4UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023EB8UL)
#define CYREG_PERI_MS_PPU_FX218_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX219)
  */
#define CYREG_PERI_MS_PPU_FX219_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023EC0UL)
#define CYREG_PERI_MS_PPU_FX219_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023EC4UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023ED0UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023ED4UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023ED8UL)
#define CYREG_PERI_MS_PPU_FX219_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023EDCUL)
#define CYREG_PERI_MS_PPU_FX219_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023EE0UL)
#define CYREG_PERI_MS_PPU_FX219_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023EE4UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023EF0UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023EF4UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023EF8UL)
#define CYREG_PERI_MS_PPU_FX219_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX220)
  */
#define CYREG_PERI_MS_PPU_FX220_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023F00UL)
#define CYREG_PERI_MS_PPU_FX220_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023F04UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023F10UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023F14UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023F18UL)
#define CYREG_PERI_MS_PPU_FX220_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023F1CUL)
#define CYREG_PERI_MS_PPU_FX220_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023F20UL)
#define CYREG_PERI_MS_PPU_FX220_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023F24UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023F30UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023F34UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023F38UL)
#define CYREG_PERI_MS_PPU_FX220_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX221)
  */
#define CYREG_PERI_MS_PPU_FX221_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023F40UL)
#define CYREG_PERI_MS_PPU_FX221_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023F44UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023F50UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023F54UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023F58UL)
#define CYREG_PERI_MS_PPU_FX221_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023F5CUL)
#define CYREG_PERI_MS_PPU_FX221_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023F60UL)
#define CYREG_PERI_MS_PPU_FX221_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023F64UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023F70UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023F74UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023F78UL)
#define CYREG_PERI_MS_PPU_FX221_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX222)
  */
#define CYREG_PERI_MS_PPU_FX222_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023F80UL)
#define CYREG_PERI_MS_PPU_FX222_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023F84UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023F90UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023F94UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023F98UL)
#define CYREG_PERI_MS_PPU_FX222_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023F9CUL)
#define CYREG_PERI_MS_PPU_FX222_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023FA0UL)
#define CYREG_PERI_MS_PPU_FX222_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023FA4UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023FB0UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023FB4UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023FB8UL)
#define CYREG_PERI_MS_PPU_FX222_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX223)
  */
#define CYREG_PERI_MS_PPU_FX223_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40023FC0UL)
#define CYREG_PERI_MS_PPU_FX223_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40023FC4UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40023FD0UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40023FD4UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40023FD8UL)
#define CYREG_PERI_MS_PPU_FX223_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40023FDCUL)
#define CYREG_PERI_MS_PPU_FX223_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40023FE0UL)
#define CYREG_PERI_MS_PPU_FX223_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40023FE4UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40023FF0UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40023FF4UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40023FF8UL)
#define CYREG_PERI_MS_PPU_FX223_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40023FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX224)
  */
#define CYREG_PERI_MS_PPU_FX224_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024000UL)
#define CYREG_PERI_MS_PPU_FX224_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024004UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024010UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024014UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024018UL)
#define CYREG_PERI_MS_PPU_FX224_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002401CUL)
#define CYREG_PERI_MS_PPU_FX224_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024020UL)
#define CYREG_PERI_MS_PPU_FX224_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024024UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024030UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024034UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024038UL)
#define CYREG_PERI_MS_PPU_FX224_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002403CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX225)
  */
#define CYREG_PERI_MS_PPU_FX225_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024040UL)
#define CYREG_PERI_MS_PPU_FX225_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024044UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024050UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024054UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024058UL)
#define CYREG_PERI_MS_PPU_FX225_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002405CUL)
#define CYREG_PERI_MS_PPU_FX225_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024060UL)
#define CYREG_PERI_MS_PPU_FX225_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024064UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024070UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024074UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024078UL)
#define CYREG_PERI_MS_PPU_FX225_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002407CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX226)
  */
#define CYREG_PERI_MS_PPU_FX226_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024080UL)
#define CYREG_PERI_MS_PPU_FX226_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024084UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024090UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024094UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024098UL)
#define CYREG_PERI_MS_PPU_FX226_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002409CUL)
#define CYREG_PERI_MS_PPU_FX226_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400240A0UL)
#define CYREG_PERI_MS_PPU_FX226_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400240A4UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400240B0UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400240B4UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400240B8UL)
#define CYREG_PERI_MS_PPU_FX226_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400240BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX227)
  */
#define CYREG_PERI_MS_PPU_FX227_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400240C0UL)
#define CYREG_PERI_MS_PPU_FX227_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400240C4UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400240D0UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400240D4UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400240D8UL)
#define CYREG_PERI_MS_PPU_FX227_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400240DCUL)
#define CYREG_PERI_MS_PPU_FX227_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400240E0UL)
#define CYREG_PERI_MS_PPU_FX227_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400240E4UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400240F0UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400240F4UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400240F8UL)
#define CYREG_PERI_MS_PPU_FX227_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400240FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX228)
  */
#define CYREG_PERI_MS_PPU_FX228_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024100UL)
#define CYREG_PERI_MS_PPU_FX228_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024104UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024110UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024114UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024118UL)
#define CYREG_PERI_MS_PPU_FX228_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002411CUL)
#define CYREG_PERI_MS_PPU_FX228_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024120UL)
#define CYREG_PERI_MS_PPU_FX228_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024124UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024130UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024134UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024138UL)
#define CYREG_PERI_MS_PPU_FX228_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002413CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX229)
  */
#define CYREG_PERI_MS_PPU_FX229_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024140UL)
#define CYREG_PERI_MS_PPU_FX229_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024144UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024150UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024154UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024158UL)
#define CYREG_PERI_MS_PPU_FX229_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002415CUL)
#define CYREG_PERI_MS_PPU_FX229_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024160UL)
#define CYREG_PERI_MS_PPU_FX229_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024164UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024170UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024174UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024178UL)
#define CYREG_PERI_MS_PPU_FX229_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002417CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX230)
  */
#define CYREG_PERI_MS_PPU_FX230_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024180UL)
#define CYREG_PERI_MS_PPU_FX230_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024184UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024190UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024194UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024198UL)
#define CYREG_PERI_MS_PPU_FX230_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002419CUL)
#define CYREG_PERI_MS_PPU_FX230_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400241A0UL)
#define CYREG_PERI_MS_PPU_FX230_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400241A4UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400241B0UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400241B4UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400241B8UL)
#define CYREG_PERI_MS_PPU_FX230_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400241BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX231)
  */
#define CYREG_PERI_MS_PPU_FX231_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400241C0UL)
#define CYREG_PERI_MS_PPU_FX231_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400241C4UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400241D0UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400241D4UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400241D8UL)
#define CYREG_PERI_MS_PPU_FX231_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400241DCUL)
#define CYREG_PERI_MS_PPU_FX231_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400241E0UL)
#define CYREG_PERI_MS_PPU_FX231_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400241E4UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400241F0UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400241F4UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400241F8UL)
#define CYREG_PERI_MS_PPU_FX231_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400241FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX232)
  */
#define CYREG_PERI_MS_PPU_FX232_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024200UL)
#define CYREG_PERI_MS_PPU_FX232_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024204UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024210UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024214UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024218UL)
#define CYREG_PERI_MS_PPU_FX232_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002421CUL)
#define CYREG_PERI_MS_PPU_FX232_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024220UL)
#define CYREG_PERI_MS_PPU_FX232_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024224UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024230UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024234UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024238UL)
#define CYREG_PERI_MS_PPU_FX232_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002423CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX233)
  */
#define CYREG_PERI_MS_PPU_FX233_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024240UL)
#define CYREG_PERI_MS_PPU_FX233_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024244UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024250UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024254UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024258UL)
#define CYREG_PERI_MS_PPU_FX233_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002425CUL)
#define CYREG_PERI_MS_PPU_FX233_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024260UL)
#define CYREG_PERI_MS_PPU_FX233_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024264UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024270UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024274UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024278UL)
#define CYREG_PERI_MS_PPU_FX233_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002427CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX234)
  */
#define CYREG_PERI_MS_PPU_FX234_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024280UL)
#define CYREG_PERI_MS_PPU_FX234_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024284UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024290UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024294UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024298UL)
#define CYREG_PERI_MS_PPU_FX234_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002429CUL)
#define CYREG_PERI_MS_PPU_FX234_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400242A0UL)
#define CYREG_PERI_MS_PPU_FX234_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400242A4UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400242B0UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400242B4UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400242B8UL)
#define CYREG_PERI_MS_PPU_FX234_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400242BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX235)
  */
#define CYREG_PERI_MS_PPU_FX235_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400242C0UL)
#define CYREG_PERI_MS_PPU_FX235_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400242C4UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400242D0UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400242D4UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400242D8UL)
#define CYREG_PERI_MS_PPU_FX235_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400242DCUL)
#define CYREG_PERI_MS_PPU_FX235_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400242E0UL)
#define CYREG_PERI_MS_PPU_FX235_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400242E4UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400242F0UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400242F4UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400242F8UL)
#define CYREG_PERI_MS_PPU_FX235_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400242FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX236)
  */
#define CYREG_PERI_MS_PPU_FX236_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024300UL)
#define CYREG_PERI_MS_PPU_FX236_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024304UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024310UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024314UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024318UL)
#define CYREG_PERI_MS_PPU_FX236_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002431CUL)
#define CYREG_PERI_MS_PPU_FX236_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024320UL)
#define CYREG_PERI_MS_PPU_FX236_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024324UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024330UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024334UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024338UL)
#define CYREG_PERI_MS_PPU_FX236_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002433CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX237)
  */
#define CYREG_PERI_MS_PPU_FX237_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024340UL)
#define CYREG_PERI_MS_PPU_FX237_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024344UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024350UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024354UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024358UL)
#define CYREG_PERI_MS_PPU_FX237_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002435CUL)
#define CYREG_PERI_MS_PPU_FX237_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024360UL)
#define CYREG_PERI_MS_PPU_FX237_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024364UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024370UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024374UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024378UL)
#define CYREG_PERI_MS_PPU_FX237_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002437CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX238)
  */
#define CYREG_PERI_MS_PPU_FX238_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024380UL)
#define CYREG_PERI_MS_PPU_FX238_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024384UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024390UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024394UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024398UL)
#define CYREG_PERI_MS_PPU_FX238_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002439CUL)
#define CYREG_PERI_MS_PPU_FX238_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400243A0UL)
#define CYREG_PERI_MS_PPU_FX238_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400243A4UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400243B0UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400243B4UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400243B8UL)
#define CYREG_PERI_MS_PPU_FX238_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400243BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX239)
  */
#define CYREG_PERI_MS_PPU_FX239_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400243C0UL)
#define CYREG_PERI_MS_PPU_FX239_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400243C4UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400243D0UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400243D4UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400243D8UL)
#define CYREG_PERI_MS_PPU_FX239_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400243DCUL)
#define CYREG_PERI_MS_PPU_FX239_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400243E0UL)
#define CYREG_PERI_MS_PPU_FX239_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400243E4UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400243F0UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400243F4UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400243F8UL)
#define CYREG_PERI_MS_PPU_FX239_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400243FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX240)
  */
#define CYREG_PERI_MS_PPU_FX240_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024400UL)
#define CYREG_PERI_MS_PPU_FX240_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024404UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024410UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024414UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024418UL)
#define CYREG_PERI_MS_PPU_FX240_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002441CUL)
#define CYREG_PERI_MS_PPU_FX240_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024420UL)
#define CYREG_PERI_MS_PPU_FX240_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024424UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024430UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024434UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024438UL)
#define CYREG_PERI_MS_PPU_FX240_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002443CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX241)
  */
#define CYREG_PERI_MS_PPU_FX241_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024440UL)
#define CYREG_PERI_MS_PPU_FX241_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024444UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024450UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024454UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024458UL)
#define CYREG_PERI_MS_PPU_FX241_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002445CUL)
#define CYREG_PERI_MS_PPU_FX241_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024460UL)
#define CYREG_PERI_MS_PPU_FX241_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024464UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024470UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024474UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024478UL)
#define CYREG_PERI_MS_PPU_FX241_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002447CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX242)
  */
#define CYREG_PERI_MS_PPU_FX242_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024480UL)
#define CYREG_PERI_MS_PPU_FX242_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024484UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024490UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024494UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024498UL)
#define CYREG_PERI_MS_PPU_FX242_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002449CUL)
#define CYREG_PERI_MS_PPU_FX242_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400244A0UL)
#define CYREG_PERI_MS_PPU_FX242_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400244A4UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400244B0UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400244B4UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400244B8UL)
#define CYREG_PERI_MS_PPU_FX242_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400244BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX243)
  */
#define CYREG_PERI_MS_PPU_FX243_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400244C0UL)
#define CYREG_PERI_MS_PPU_FX243_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400244C4UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400244D0UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400244D4UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400244D8UL)
#define CYREG_PERI_MS_PPU_FX243_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400244DCUL)
#define CYREG_PERI_MS_PPU_FX243_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400244E0UL)
#define CYREG_PERI_MS_PPU_FX243_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400244E4UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400244F0UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400244F4UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400244F8UL)
#define CYREG_PERI_MS_PPU_FX243_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400244FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX244)
  */
#define CYREG_PERI_MS_PPU_FX244_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024500UL)
#define CYREG_PERI_MS_PPU_FX244_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024504UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024510UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024514UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024518UL)
#define CYREG_PERI_MS_PPU_FX244_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002451CUL)
#define CYREG_PERI_MS_PPU_FX244_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024520UL)
#define CYREG_PERI_MS_PPU_FX244_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024524UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024530UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024534UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024538UL)
#define CYREG_PERI_MS_PPU_FX244_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002453CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX245)
  */
#define CYREG_PERI_MS_PPU_FX245_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024540UL)
#define CYREG_PERI_MS_PPU_FX245_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024544UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024550UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024554UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024558UL)
#define CYREG_PERI_MS_PPU_FX245_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002455CUL)
#define CYREG_PERI_MS_PPU_FX245_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024560UL)
#define CYREG_PERI_MS_PPU_FX245_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024564UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024570UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024574UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024578UL)
#define CYREG_PERI_MS_PPU_FX245_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002457CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX246)
  */
#define CYREG_PERI_MS_PPU_FX246_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024580UL)
#define CYREG_PERI_MS_PPU_FX246_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024584UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024590UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024594UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024598UL)
#define CYREG_PERI_MS_PPU_FX246_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002459CUL)
#define CYREG_PERI_MS_PPU_FX246_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400245A0UL)
#define CYREG_PERI_MS_PPU_FX246_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400245A4UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400245B0UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400245B4UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400245B8UL)
#define CYREG_PERI_MS_PPU_FX246_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400245BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX247)
  */
#define CYREG_PERI_MS_PPU_FX247_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400245C0UL)
#define CYREG_PERI_MS_PPU_FX247_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400245C4UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400245D0UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400245D4UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400245D8UL)
#define CYREG_PERI_MS_PPU_FX247_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400245DCUL)
#define CYREG_PERI_MS_PPU_FX247_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400245E0UL)
#define CYREG_PERI_MS_PPU_FX247_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400245E4UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400245F0UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400245F4UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400245F8UL)
#define CYREG_PERI_MS_PPU_FX247_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400245FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX248)
  */
#define CYREG_PERI_MS_PPU_FX248_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024600UL)
#define CYREG_PERI_MS_PPU_FX248_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024604UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024610UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024614UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024618UL)
#define CYREG_PERI_MS_PPU_FX248_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002461CUL)
#define CYREG_PERI_MS_PPU_FX248_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024620UL)
#define CYREG_PERI_MS_PPU_FX248_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024624UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024630UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024634UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024638UL)
#define CYREG_PERI_MS_PPU_FX248_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002463CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX249)
  */
#define CYREG_PERI_MS_PPU_FX249_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024640UL)
#define CYREG_PERI_MS_PPU_FX249_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024644UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024650UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024654UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024658UL)
#define CYREG_PERI_MS_PPU_FX249_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002465CUL)
#define CYREG_PERI_MS_PPU_FX249_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024660UL)
#define CYREG_PERI_MS_PPU_FX249_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024664UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024670UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024674UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024678UL)
#define CYREG_PERI_MS_PPU_FX249_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002467CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX250)
  */
#define CYREG_PERI_MS_PPU_FX250_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024680UL)
#define CYREG_PERI_MS_PPU_FX250_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024684UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024690UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024694UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024698UL)
#define CYREG_PERI_MS_PPU_FX250_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002469CUL)
#define CYREG_PERI_MS_PPU_FX250_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400246A0UL)
#define CYREG_PERI_MS_PPU_FX250_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400246A4UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400246B0UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400246B4UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400246B8UL)
#define CYREG_PERI_MS_PPU_FX250_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400246BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX251)
  */
#define CYREG_PERI_MS_PPU_FX251_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400246C0UL)
#define CYREG_PERI_MS_PPU_FX251_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400246C4UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400246D0UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400246D4UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400246D8UL)
#define CYREG_PERI_MS_PPU_FX251_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400246DCUL)
#define CYREG_PERI_MS_PPU_FX251_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400246E0UL)
#define CYREG_PERI_MS_PPU_FX251_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400246E4UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400246F0UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400246F4UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400246F8UL)
#define CYREG_PERI_MS_PPU_FX251_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400246FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX252)
  */
#define CYREG_PERI_MS_PPU_FX252_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024700UL)
#define CYREG_PERI_MS_PPU_FX252_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024704UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024710UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024714UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024718UL)
#define CYREG_PERI_MS_PPU_FX252_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002471CUL)
#define CYREG_PERI_MS_PPU_FX252_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024720UL)
#define CYREG_PERI_MS_PPU_FX252_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024724UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024730UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024734UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024738UL)
#define CYREG_PERI_MS_PPU_FX252_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002473CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX253)
  */
#define CYREG_PERI_MS_PPU_FX253_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024740UL)
#define CYREG_PERI_MS_PPU_FX253_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024744UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024750UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024754UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024758UL)
#define CYREG_PERI_MS_PPU_FX253_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002475CUL)
#define CYREG_PERI_MS_PPU_FX253_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024760UL)
#define CYREG_PERI_MS_PPU_FX253_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024764UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024770UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024774UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024778UL)
#define CYREG_PERI_MS_PPU_FX253_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002477CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX254)
  */
#define CYREG_PERI_MS_PPU_FX254_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024780UL)
#define CYREG_PERI_MS_PPU_FX254_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024784UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024790UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024794UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024798UL)
#define CYREG_PERI_MS_PPU_FX254_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002479CUL)
#define CYREG_PERI_MS_PPU_FX254_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400247A0UL)
#define CYREG_PERI_MS_PPU_FX254_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400247A4UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400247B0UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400247B4UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400247B8UL)
#define CYREG_PERI_MS_PPU_FX254_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400247BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX255)
  */
#define CYREG_PERI_MS_PPU_FX255_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400247C0UL)
#define CYREG_PERI_MS_PPU_FX255_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400247C4UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400247D0UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400247D4UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400247D8UL)
#define CYREG_PERI_MS_PPU_FX255_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400247DCUL)
#define CYREG_PERI_MS_PPU_FX255_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400247E0UL)
#define CYREG_PERI_MS_PPU_FX255_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400247E4UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400247F0UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400247F4UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400247F8UL)
#define CYREG_PERI_MS_PPU_FX255_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400247FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX256)
  */
#define CYREG_PERI_MS_PPU_FX256_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024800UL)
#define CYREG_PERI_MS_PPU_FX256_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024804UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024810UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024814UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024818UL)
#define CYREG_PERI_MS_PPU_FX256_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002481CUL)
#define CYREG_PERI_MS_PPU_FX256_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024820UL)
#define CYREG_PERI_MS_PPU_FX256_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024824UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024830UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024834UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024838UL)
#define CYREG_PERI_MS_PPU_FX256_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002483CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX257)
  */
#define CYREG_PERI_MS_PPU_FX257_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024840UL)
#define CYREG_PERI_MS_PPU_FX257_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024844UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024850UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024854UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024858UL)
#define CYREG_PERI_MS_PPU_FX257_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002485CUL)
#define CYREG_PERI_MS_PPU_FX257_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024860UL)
#define CYREG_PERI_MS_PPU_FX257_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024864UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024870UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024874UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024878UL)
#define CYREG_PERI_MS_PPU_FX257_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002487CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX258)
  */
#define CYREG_PERI_MS_PPU_FX258_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024880UL)
#define CYREG_PERI_MS_PPU_FX258_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024884UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024890UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024894UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024898UL)
#define CYREG_PERI_MS_PPU_FX258_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002489CUL)
#define CYREG_PERI_MS_PPU_FX258_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400248A0UL)
#define CYREG_PERI_MS_PPU_FX258_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400248A4UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400248B0UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400248B4UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400248B8UL)
#define CYREG_PERI_MS_PPU_FX258_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400248BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX259)
  */
#define CYREG_PERI_MS_PPU_FX259_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400248C0UL)
#define CYREG_PERI_MS_PPU_FX259_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400248C4UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400248D0UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400248D4UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400248D8UL)
#define CYREG_PERI_MS_PPU_FX259_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400248DCUL)
#define CYREG_PERI_MS_PPU_FX259_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400248E0UL)
#define CYREG_PERI_MS_PPU_FX259_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400248E4UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400248F0UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400248F4UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400248F8UL)
#define CYREG_PERI_MS_PPU_FX259_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400248FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX260)
  */
#define CYREG_PERI_MS_PPU_FX260_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024900UL)
#define CYREG_PERI_MS_PPU_FX260_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024904UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024910UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024914UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024918UL)
#define CYREG_PERI_MS_PPU_FX260_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002491CUL)
#define CYREG_PERI_MS_PPU_FX260_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024920UL)
#define CYREG_PERI_MS_PPU_FX260_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024924UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024930UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024934UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024938UL)
#define CYREG_PERI_MS_PPU_FX260_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002493CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX261)
  */
#define CYREG_PERI_MS_PPU_FX261_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024940UL)
#define CYREG_PERI_MS_PPU_FX261_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024944UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024950UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024954UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024958UL)
#define CYREG_PERI_MS_PPU_FX261_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002495CUL)
#define CYREG_PERI_MS_PPU_FX261_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024960UL)
#define CYREG_PERI_MS_PPU_FX261_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024964UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024970UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024974UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024978UL)
#define CYREG_PERI_MS_PPU_FX261_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002497CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX262)
  */
#define CYREG_PERI_MS_PPU_FX262_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024980UL)
#define CYREG_PERI_MS_PPU_FX262_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024984UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024990UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024994UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024998UL)
#define CYREG_PERI_MS_PPU_FX262_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002499CUL)
#define CYREG_PERI_MS_PPU_FX262_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400249A0UL)
#define CYREG_PERI_MS_PPU_FX262_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400249A4UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400249B0UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400249B4UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400249B8UL)
#define CYREG_PERI_MS_PPU_FX262_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400249BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX263)
  */
#define CYREG_PERI_MS_PPU_FX263_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400249C0UL)
#define CYREG_PERI_MS_PPU_FX263_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400249C4UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400249D0UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400249D4UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400249D8UL)
#define CYREG_PERI_MS_PPU_FX263_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400249DCUL)
#define CYREG_PERI_MS_PPU_FX263_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400249E0UL)
#define CYREG_PERI_MS_PPU_FX263_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400249E4UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400249F0UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400249F4UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400249F8UL)
#define CYREG_PERI_MS_PPU_FX263_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400249FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX264)
  */
#define CYREG_PERI_MS_PPU_FX264_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024A00UL)
#define CYREG_PERI_MS_PPU_FX264_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024A04UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024A10UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024A14UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024A18UL)
#define CYREG_PERI_MS_PPU_FX264_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024A1CUL)
#define CYREG_PERI_MS_PPU_FX264_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024A20UL)
#define CYREG_PERI_MS_PPU_FX264_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024A24UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024A30UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024A34UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024A38UL)
#define CYREG_PERI_MS_PPU_FX264_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX265)
  */
#define CYREG_PERI_MS_PPU_FX265_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024A40UL)
#define CYREG_PERI_MS_PPU_FX265_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024A44UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024A50UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024A54UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024A58UL)
#define CYREG_PERI_MS_PPU_FX265_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024A5CUL)
#define CYREG_PERI_MS_PPU_FX265_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024A60UL)
#define CYREG_PERI_MS_PPU_FX265_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024A64UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024A70UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024A74UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024A78UL)
#define CYREG_PERI_MS_PPU_FX265_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX266)
  */
#define CYREG_PERI_MS_PPU_FX266_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024A80UL)
#define CYREG_PERI_MS_PPU_FX266_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024A84UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024A90UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024A94UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024A98UL)
#define CYREG_PERI_MS_PPU_FX266_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024A9CUL)
#define CYREG_PERI_MS_PPU_FX266_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024AA0UL)
#define CYREG_PERI_MS_PPU_FX266_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024AA4UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024AB0UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024AB4UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024AB8UL)
#define CYREG_PERI_MS_PPU_FX266_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX267)
  */
#define CYREG_PERI_MS_PPU_FX267_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024AC0UL)
#define CYREG_PERI_MS_PPU_FX267_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024AC4UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024AD0UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024AD4UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024AD8UL)
#define CYREG_PERI_MS_PPU_FX267_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024ADCUL)
#define CYREG_PERI_MS_PPU_FX267_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024AE0UL)
#define CYREG_PERI_MS_PPU_FX267_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024AE4UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024AF0UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024AF4UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024AF8UL)
#define CYREG_PERI_MS_PPU_FX267_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX268)
  */
#define CYREG_PERI_MS_PPU_FX268_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024B00UL)
#define CYREG_PERI_MS_PPU_FX268_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024B04UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024B10UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024B14UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024B18UL)
#define CYREG_PERI_MS_PPU_FX268_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024B1CUL)
#define CYREG_PERI_MS_PPU_FX268_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024B20UL)
#define CYREG_PERI_MS_PPU_FX268_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024B24UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024B30UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024B34UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024B38UL)
#define CYREG_PERI_MS_PPU_FX268_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX269)
  */
#define CYREG_PERI_MS_PPU_FX269_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024B40UL)
#define CYREG_PERI_MS_PPU_FX269_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024B44UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024B50UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024B54UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024B58UL)
#define CYREG_PERI_MS_PPU_FX269_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024B5CUL)
#define CYREG_PERI_MS_PPU_FX269_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024B60UL)
#define CYREG_PERI_MS_PPU_FX269_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024B64UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024B70UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024B74UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024B78UL)
#define CYREG_PERI_MS_PPU_FX269_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX270)
  */
#define CYREG_PERI_MS_PPU_FX270_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024B80UL)
#define CYREG_PERI_MS_PPU_FX270_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024B84UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024B90UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024B94UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024B98UL)
#define CYREG_PERI_MS_PPU_FX270_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024B9CUL)
#define CYREG_PERI_MS_PPU_FX270_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024BA0UL)
#define CYREG_PERI_MS_PPU_FX270_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024BA4UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024BB0UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024BB4UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024BB8UL)
#define CYREG_PERI_MS_PPU_FX270_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX271)
  */
#define CYREG_PERI_MS_PPU_FX271_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024BC0UL)
#define CYREG_PERI_MS_PPU_FX271_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024BC4UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024BD0UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024BD4UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024BD8UL)
#define CYREG_PERI_MS_PPU_FX271_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024BDCUL)
#define CYREG_PERI_MS_PPU_FX271_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024BE0UL)
#define CYREG_PERI_MS_PPU_FX271_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024BE4UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024BF0UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024BF4UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024BF8UL)
#define CYREG_PERI_MS_PPU_FX271_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX272)
  */
#define CYREG_PERI_MS_PPU_FX272_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024C00UL)
#define CYREG_PERI_MS_PPU_FX272_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024C04UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024C10UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024C14UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024C18UL)
#define CYREG_PERI_MS_PPU_FX272_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024C1CUL)
#define CYREG_PERI_MS_PPU_FX272_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024C20UL)
#define CYREG_PERI_MS_PPU_FX272_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024C24UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024C30UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024C34UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024C38UL)
#define CYREG_PERI_MS_PPU_FX272_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX273)
  */
#define CYREG_PERI_MS_PPU_FX273_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024C40UL)
#define CYREG_PERI_MS_PPU_FX273_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024C44UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024C50UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024C54UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024C58UL)
#define CYREG_PERI_MS_PPU_FX273_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024C5CUL)
#define CYREG_PERI_MS_PPU_FX273_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024C60UL)
#define CYREG_PERI_MS_PPU_FX273_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024C64UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024C70UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024C74UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024C78UL)
#define CYREG_PERI_MS_PPU_FX273_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX274)
  */
#define CYREG_PERI_MS_PPU_FX274_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024C80UL)
#define CYREG_PERI_MS_PPU_FX274_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024C84UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024C90UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024C94UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024C98UL)
#define CYREG_PERI_MS_PPU_FX274_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024C9CUL)
#define CYREG_PERI_MS_PPU_FX274_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024CA0UL)
#define CYREG_PERI_MS_PPU_FX274_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024CA4UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024CB0UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024CB4UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024CB8UL)
#define CYREG_PERI_MS_PPU_FX274_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX275)
  */
#define CYREG_PERI_MS_PPU_FX275_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024CC0UL)
#define CYREG_PERI_MS_PPU_FX275_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024CC4UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024CD0UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024CD4UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024CD8UL)
#define CYREG_PERI_MS_PPU_FX275_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024CDCUL)
#define CYREG_PERI_MS_PPU_FX275_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024CE0UL)
#define CYREG_PERI_MS_PPU_FX275_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024CE4UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024CF0UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024CF4UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024CF8UL)
#define CYREG_PERI_MS_PPU_FX275_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX276)
  */
#define CYREG_PERI_MS_PPU_FX276_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024D00UL)
#define CYREG_PERI_MS_PPU_FX276_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024D04UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024D10UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024D14UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024D18UL)
#define CYREG_PERI_MS_PPU_FX276_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024D1CUL)
#define CYREG_PERI_MS_PPU_FX276_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024D20UL)
#define CYREG_PERI_MS_PPU_FX276_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024D24UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024D30UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024D34UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024D38UL)
#define CYREG_PERI_MS_PPU_FX276_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX277)
  */
#define CYREG_PERI_MS_PPU_FX277_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024D40UL)
#define CYREG_PERI_MS_PPU_FX277_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024D44UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024D50UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024D54UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024D58UL)
#define CYREG_PERI_MS_PPU_FX277_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024D5CUL)
#define CYREG_PERI_MS_PPU_FX277_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024D60UL)
#define CYREG_PERI_MS_PPU_FX277_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024D64UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024D70UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024D74UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024D78UL)
#define CYREG_PERI_MS_PPU_FX277_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX278)
  */
#define CYREG_PERI_MS_PPU_FX278_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024D80UL)
#define CYREG_PERI_MS_PPU_FX278_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024D84UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024D90UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024D94UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024D98UL)
#define CYREG_PERI_MS_PPU_FX278_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024D9CUL)
#define CYREG_PERI_MS_PPU_FX278_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024DA0UL)
#define CYREG_PERI_MS_PPU_FX278_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024DA4UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024DB0UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024DB4UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024DB8UL)
#define CYREG_PERI_MS_PPU_FX278_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX279)
  */
#define CYREG_PERI_MS_PPU_FX279_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024DC0UL)
#define CYREG_PERI_MS_PPU_FX279_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024DC4UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024DD0UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024DD4UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024DD8UL)
#define CYREG_PERI_MS_PPU_FX279_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024DDCUL)
#define CYREG_PERI_MS_PPU_FX279_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024DE0UL)
#define CYREG_PERI_MS_PPU_FX279_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024DE4UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024DF0UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024DF4UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024DF8UL)
#define CYREG_PERI_MS_PPU_FX279_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX280)
  */
#define CYREG_PERI_MS_PPU_FX280_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024E00UL)
#define CYREG_PERI_MS_PPU_FX280_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024E04UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024E10UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024E14UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024E18UL)
#define CYREG_PERI_MS_PPU_FX280_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024E1CUL)
#define CYREG_PERI_MS_PPU_FX280_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024E20UL)
#define CYREG_PERI_MS_PPU_FX280_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024E24UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024E30UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024E34UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024E38UL)
#define CYREG_PERI_MS_PPU_FX280_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX281)
  */
#define CYREG_PERI_MS_PPU_FX281_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024E40UL)
#define CYREG_PERI_MS_PPU_FX281_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024E44UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024E50UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024E54UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024E58UL)
#define CYREG_PERI_MS_PPU_FX281_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024E5CUL)
#define CYREG_PERI_MS_PPU_FX281_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024E60UL)
#define CYREG_PERI_MS_PPU_FX281_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024E64UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024E70UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024E74UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024E78UL)
#define CYREG_PERI_MS_PPU_FX281_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX282)
  */
#define CYREG_PERI_MS_PPU_FX282_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024E80UL)
#define CYREG_PERI_MS_PPU_FX282_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024E84UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024E90UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024E94UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024E98UL)
#define CYREG_PERI_MS_PPU_FX282_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024E9CUL)
#define CYREG_PERI_MS_PPU_FX282_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024EA0UL)
#define CYREG_PERI_MS_PPU_FX282_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024EA4UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024EB0UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024EB4UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024EB8UL)
#define CYREG_PERI_MS_PPU_FX282_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX283)
  */
#define CYREG_PERI_MS_PPU_FX283_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024EC0UL)
#define CYREG_PERI_MS_PPU_FX283_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024EC4UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024ED0UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024ED4UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024ED8UL)
#define CYREG_PERI_MS_PPU_FX283_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024EDCUL)
#define CYREG_PERI_MS_PPU_FX283_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024EE0UL)
#define CYREG_PERI_MS_PPU_FX283_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024EE4UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024EF0UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024EF4UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024EF8UL)
#define CYREG_PERI_MS_PPU_FX283_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX284)
  */
#define CYREG_PERI_MS_PPU_FX284_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024F00UL)
#define CYREG_PERI_MS_PPU_FX284_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024F04UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024F10UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024F14UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024F18UL)
#define CYREG_PERI_MS_PPU_FX284_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024F1CUL)
#define CYREG_PERI_MS_PPU_FX284_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024F20UL)
#define CYREG_PERI_MS_PPU_FX284_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024F24UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024F30UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024F34UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024F38UL)
#define CYREG_PERI_MS_PPU_FX284_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX285)
  */
#define CYREG_PERI_MS_PPU_FX285_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024F40UL)
#define CYREG_PERI_MS_PPU_FX285_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024F44UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024F50UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024F54UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024F58UL)
#define CYREG_PERI_MS_PPU_FX285_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024F5CUL)
#define CYREG_PERI_MS_PPU_FX285_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024F60UL)
#define CYREG_PERI_MS_PPU_FX285_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024F64UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024F70UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024F74UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024F78UL)
#define CYREG_PERI_MS_PPU_FX285_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX286)
  */
#define CYREG_PERI_MS_PPU_FX286_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024F80UL)
#define CYREG_PERI_MS_PPU_FX286_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024F84UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024F90UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024F94UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024F98UL)
#define CYREG_PERI_MS_PPU_FX286_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024F9CUL)
#define CYREG_PERI_MS_PPU_FX286_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024FA0UL)
#define CYREG_PERI_MS_PPU_FX286_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024FA4UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024FB0UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024FB4UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024FB8UL)
#define CYREG_PERI_MS_PPU_FX286_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX287)
  */
#define CYREG_PERI_MS_PPU_FX287_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40024FC0UL)
#define CYREG_PERI_MS_PPU_FX287_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40024FC4UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40024FD0UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40024FD4UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40024FD8UL)
#define CYREG_PERI_MS_PPU_FX287_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40024FDCUL)
#define CYREG_PERI_MS_PPU_FX287_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40024FE0UL)
#define CYREG_PERI_MS_PPU_FX287_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40024FE4UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40024FF0UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40024FF4UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40024FF8UL)
#define CYREG_PERI_MS_PPU_FX287_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40024FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX288)
  */
#define CYREG_PERI_MS_PPU_FX288_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025000UL)
#define CYREG_PERI_MS_PPU_FX288_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025004UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025010UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025014UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025018UL)
#define CYREG_PERI_MS_PPU_FX288_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002501CUL)
#define CYREG_PERI_MS_PPU_FX288_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025020UL)
#define CYREG_PERI_MS_PPU_FX288_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025024UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025030UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025034UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025038UL)
#define CYREG_PERI_MS_PPU_FX288_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002503CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX289)
  */
#define CYREG_PERI_MS_PPU_FX289_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025040UL)
#define CYREG_PERI_MS_PPU_FX289_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025044UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025050UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025054UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025058UL)
#define CYREG_PERI_MS_PPU_FX289_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002505CUL)
#define CYREG_PERI_MS_PPU_FX289_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025060UL)
#define CYREG_PERI_MS_PPU_FX289_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025064UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025070UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025074UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025078UL)
#define CYREG_PERI_MS_PPU_FX289_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002507CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX290)
  */
#define CYREG_PERI_MS_PPU_FX290_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025080UL)
#define CYREG_PERI_MS_PPU_FX290_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025084UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025090UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025094UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025098UL)
#define CYREG_PERI_MS_PPU_FX290_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002509CUL)
#define CYREG_PERI_MS_PPU_FX290_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400250A0UL)
#define CYREG_PERI_MS_PPU_FX290_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400250A4UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400250B0UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400250B4UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400250B8UL)
#define CYREG_PERI_MS_PPU_FX290_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400250BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX291)
  */
#define CYREG_PERI_MS_PPU_FX291_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400250C0UL)
#define CYREG_PERI_MS_PPU_FX291_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400250C4UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400250D0UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400250D4UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400250D8UL)
#define CYREG_PERI_MS_PPU_FX291_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400250DCUL)
#define CYREG_PERI_MS_PPU_FX291_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400250E0UL)
#define CYREG_PERI_MS_PPU_FX291_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400250E4UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400250F0UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400250F4UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400250F8UL)
#define CYREG_PERI_MS_PPU_FX291_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400250FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX292)
  */
#define CYREG_PERI_MS_PPU_FX292_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025100UL)
#define CYREG_PERI_MS_PPU_FX292_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025104UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025110UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025114UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025118UL)
#define CYREG_PERI_MS_PPU_FX292_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002511CUL)
#define CYREG_PERI_MS_PPU_FX292_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025120UL)
#define CYREG_PERI_MS_PPU_FX292_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025124UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025130UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025134UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025138UL)
#define CYREG_PERI_MS_PPU_FX292_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002513CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX293)
  */
#define CYREG_PERI_MS_PPU_FX293_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025140UL)
#define CYREG_PERI_MS_PPU_FX293_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025144UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025150UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025154UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025158UL)
#define CYREG_PERI_MS_PPU_FX293_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002515CUL)
#define CYREG_PERI_MS_PPU_FX293_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025160UL)
#define CYREG_PERI_MS_PPU_FX293_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025164UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025170UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025174UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025178UL)
#define CYREG_PERI_MS_PPU_FX293_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002517CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX294)
  */
#define CYREG_PERI_MS_PPU_FX294_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025180UL)
#define CYREG_PERI_MS_PPU_FX294_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025184UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025190UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025194UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025198UL)
#define CYREG_PERI_MS_PPU_FX294_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002519CUL)
#define CYREG_PERI_MS_PPU_FX294_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400251A0UL)
#define CYREG_PERI_MS_PPU_FX294_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400251A4UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400251B0UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400251B4UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400251B8UL)
#define CYREG_PERI_MS_PPU_FX294_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400251BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX295)
  */
#define CYREG_PERI_MS_PPU_FX295_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400251C0UL)
#define CYREG_PERI_MS_PPU_FX295_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400251C4UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400251D0UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400251D4UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400251D8UL)
#define CYREG_PERI_MS_PPU_FX295_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400251DCUL)
#define CYREG_PERI_MS_PPU_FX295_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400251E0UL)
#define CYREG_PERI_MS_PPU_FX295_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400251E4UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400251F0UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400251F4UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400251F8UL)
#define CYREG_PERI_MS_PPU_FX295_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400251FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX296)
  */
#define CYREG_PERI_MS_PPU_FX296_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025200UL)
#define CYREG_PERI_MS_PPU_FX296_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025204UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025210UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025214UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025218UL)
#define CYREG_PERI_MS_PPU_FX296_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002521CUL)
#define CYREG_PERI_MS_PPU_FX296_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025220UL)
#define CYREG_PERI_MS_PPU_FX296_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025224UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025230UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025234UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025238UL)
#define CYREG_PERI_MS_PPU_FX296_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002523CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX297)
  */
#define CYREG_PERI_MS_PPU_FX297_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025240UL)
#define CYREG_PERI_MS_PPU_FX297_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025244UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025250UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025254UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025258UL)
#define CYREG_PERI_MS_PPU_FX297_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002525CUL)
#define CYREG_PERI_MS_PPU_FX297_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025260UL)
#define CYREG_PERI_MS_PPU_FX297_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025264UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025270UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025274UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025278UL)
#define CYREG_PERI_MS_PPU_FX297_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002527CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX298)
  */
#define CYREG_PERI_MS_PPU_FX298_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025280UL)
#define CYREG_PERI_MS_PPU_FX298_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025284UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025290UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025294UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025298UL)
#define CYREG_PERI_MS_PPU_FX298_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002529CUL)
#define CYREG_PERI_MS_PPU_FX298_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400252A0UL)
#define CYREG_PERI_MS_PPU_FX298_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400252A4UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400252B0UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400252B4UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400252B8UL)
#define CYREG_PERI_MS_PPU_FX298_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400252BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX299)
  */
#define CYREG_PERI_MS_PPU_FX299_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400252C0UL)
#define CYREG_PERI_MS_PPU_FX299_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400252C4UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400252D0UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400252D4UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400252D8UL)
#define CYREG_PERI_MS_PPU_FX299_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400252DCUL)
#define CYREG_PERI_MS_PPU_FX299_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400252E0UL)
#define CYREG_PERI_MS_PPU_FX299_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400252E4UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400252F0UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400252F4UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400252F8UL)
#define CYREG_PERI_MS_PPU_FX299_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400252FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX300)
  */
#define CYREG_PERI_MS_PPU_FX300_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025300UL)
#define CYREG_PERI_MS_PPU_FX300_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025304UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025310UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025314UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025318UL)
#define CYREG_PERI_MS_PPU_FX300_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002531CUL)
#define CYREG_PERI_MS_PPU_FX300_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025320UL)
#define CYREG_PERI_MS_PPU_FX300_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025324UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025330UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025334UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025338UL)
#define CYREG_PERI_MS_PPU_FX300_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002533CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX301)
  */
#define CYREG_PERI_MS_PPU_FX301_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025340UL)
#define CYREG_PERI_MS_PPU_FX301_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025344UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025350UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025354UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025358UL)
#define CYREG_PERI_MS_PPU_FX301_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002535CUL)
#define CYREG_PERI_MS_PPU_FX301_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025360UL)
#define CYREG_PERI_MS_PPU_FX301_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025364UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025370UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025374UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025378UL)
#define CYREG_PERI_MS_PPU_FX301_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002537CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX302)
  */
#define CYREG_PERI_MS_PPU_FX302_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025380UL)
#define CYREG_PERI_MS_PPU_FX302_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025384UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025390UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025394UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025398UL)
#define CYREG_PERI_MS_PPU_FX302_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002539CUL)
#define CYREG_PERI_MS_PPU_FX302_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400253A0UL)
#define CYREG_PERI_MS_PPU_FX302_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400253A4UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400253B0UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400253B4UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400253B8UL)
#define CYREG_PERI_MS_PPU_FX302_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400253BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX303)
  */
#define CYREG_PERI_MS_PPU_FX303_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400253C0UL)
#define CYREG_PERI_MS_PPU_FX303_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400253C4UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400253D0UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400253D4UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400253D8UL)
#define CYREG_PERI_MS_PPU_FX303_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400253DCUL)
#define CYREG_PERI_MS_PPU_FX303_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400253E0UL)
#define CYREG_PERI_MS_PPU_FX303_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400253E4UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400253F0UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400253F4UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400253F8UL)
#define CYREG_PERI_MS_PPU_FX303_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400253FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX304)
  */
#define CYREG_PERI_MS_PPU_FX304_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025400UL)
#define CYREG_PERI_MS_PPU_FX304_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025404UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025410UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025414UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025418UL)
#define CYREG_PERI_MS_PPU_FX304_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002541CUL)
#define CYREG_PERI_MS_PPU_FX304_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025420UL)
#define CYREG_PERI_MS_PPU_FX304_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025424UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025430UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025434UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025438UL)
#define CYREG_PERI_MS_PPU_FX304_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002543CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX305)
  */
#define CYREG_PERI_MS_PPU_FX305_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025440UL)
#define CYREG_PERI_MS_PPU_FX305_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025444UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025450UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025454UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025458UL)
#define CYREG_PERI_MS_PPU_FX305_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002545CUL)
#define CYREG_PERI_MS_PPU_FX305_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025460UL)
#define CYREG_PERI_MS_PPU_FX305_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025464UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025470UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025474UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025478UL)
#define CYREG_PERI_MS_PPU_FX305_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002547CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX306)
  */
#define CYREG_PERI_MS_PPU_FX306_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025480UL)
#define CYREG_PERI_MS_PPU_FX306_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025484UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025490UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025494UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025498UL)
#define CYREG_PERI_MS_PPU_FX306_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002549CUL)
#define CYREG_PERI_MS_PPU_FX306_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400254A0UL)
#define CYREG_PERI_MS_PPU_FX306_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400254A4UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400254B0UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400254B4UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400254B8UL)
#define CYREG_PERI_MS_PPU_FX306_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400254BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX307)
  */
#define CYREG_PERI_MS_PPU_FX307_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400254C0UL)
#define CYREG_PERI_MS_PPU_FX307_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400254C4UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400254D0UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400254D4UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400254D8UL)
#define CYREG_PERI_MS_PPU_FX307_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400254DCUL)
#define CYREG_PERI_MS_PPU_FX307_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400254E0UL)
#define CYREG_PERI_MS_PPU_FX307_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400254E4UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400254F0UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400254F4UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400254F8UL)
#define CYREG_PERI_MS_PPU_FX307_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400254FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX308)
  */
#define CYREG_PERI_MS_PPU_FX308_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025500UL)
#define CYREG_PERI_MS_PPU_FX308_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025504UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025510UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025514UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025518UL)
#define CYREG_PERI_MS_PPU_FX308_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002551CUL)
#define CYREG_PERI_MS_PPU_FX308_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025520UL)
#define CYREG_PERI_MS_PPU_FX308_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025524UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025530UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025534UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025538UL)
#define CYREG_PERI_MS_PPU_FX308_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002553CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX309)
  */
#define CYREG_PERI_MS_PPU_FX309_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025540UL)
#define CYREG_PERI_MS_PPU_FX309_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025544UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025550UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025554UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025558UL)
#define CYREG_PERI_MS_PPU_FX309_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002555CUL)
#define CYREG_PERI_MS_PPU_FX309_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025560UL)
#define CYREG_PERI_MS_PPU_FX309_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025564UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025570UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025574UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025578UL)
#define CYREG_PERI_MS_PPU_FX309_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002557CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX310)
  */
#define CYREG_PERI_MS_PPU_FX310_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025580UL)
#define CYREG_PERI_MS_PPU_FX310_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025584UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025590UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025594UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025598UL)
#define CYREG_PERI_MS_PPU_FX310_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002559CUL)
#define CYREG_PERI_MS_PPU_FX310_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400255A0UL)
#define CYREG_PERI_MS_PPU_FX310_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400255A4UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400255B0UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400255B4UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400255B8UL)
#define CYREG_PERI_MS_PPU_FX310_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400255BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX311)
  */
#define CYREG_PERI_MS_PPU_FX311_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400255C0UL)
#define CYREG_PERI_MS_PPU_FX311_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400255C4UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400255D0UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400255D4UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400255D8UL)
#define CYREG_PERI_MS_PPU_FX311_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400255DCUL)
#define CYREG_PERI_MS_PPU_FX311_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400255E0UL)
#define CYREG_PERI_MS_PPU_FX311_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400255E4UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400255F0UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400255F4UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400255F8UL)
#define CYREG_PERI_MS_PPU_FX311_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400255FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX312)
  */
#define CYREG_PERI_MS_PPU_FX312_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025600UL)
#define CYREG_PERI_MS_PPU_FX312_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025604UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025610UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025614UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025618UL)
#define CYREG_PERI_MS_PPU_FX312_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002561CUL)
#define CYREG_PERI_MS_PPU_FX312_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025620UL)
#define CYREG_PERI_MS_PPU_FX312_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025624UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025630UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025634UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025638UL)
#define CYREG_PERI_MS_PPU_FX312_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002563CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX313)
  */
#define CYREG_PERI_MS_PPU_FX313_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025640UL)
#define CYREG_PERI_MS_PPU_FX313_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025644UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025650UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025654UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025658UL)
#define CYREG_PERI_MS_PPU_FX313_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002565CUL)
#define CYREG_PERI_MS_PPU_FX313_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025660UL)
#define CYREG_PERI_MS_PPU_FX313_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025664UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025670UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025674UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025678UL)
#define CYREG_PERI_MS_PPU_FX313_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002567CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX314)
  */
#define CYREG_PERI_MS_PPU_FX314_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025680UL)
#define CYREG_PERI_MS_PPU_FX314_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025684UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025690UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025694UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025698UL)
#define CYREG_PERI_MS_PPU_FX314_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002569CUL)
#define CYREG_PERI_MS_PPU_FX314_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400256A0UL)
#define CYREG_PERI_MS_PPU_FX314_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400256A4UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400256B0UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400256B4UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400256B8UL)
#define CYREG_PERI_MS_PPU_FX314_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400256BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX315)
  */
#define CYREG_PERI_MS_PPU_FX315_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400256C0UL)
#define CYREG_PERI_MS_PPU_FX315_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400256C4UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400256D0UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400256D4UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400256D8UL)
#define CYREG_PERI_MS_PPU_FX315_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400256DCUL)
#define CYREG_PERI_MS_PPU_FX315_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400256E0UL)
#define CYREG_PERI_MS_PPU_FX315_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400256E4UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400256F0UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400256F4UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400256F8UL)
#define CYREG_PERI_MS_PPU_FX315_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400256FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX316)
  */
#define CYREG_PERI_MS_PPU_FX316_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025700UL)
#define CYREG_PERI_MS_PPU_FX316_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025704UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025710UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025714UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025718UL)
#define CYREG_PERI_MS_PPU_FX316_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002571CUL)
#define CYREG_PERI_MS_PPU_FX316_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025720UL)
#define CYREG_PERI_MS_PPU_FX316_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025724UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025730UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025734UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025738UL)
#define CYREG_PERI_MS_PPU_FX316_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002573CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX317)
  */
#define CYREG_PERI_MS_PPU_FX317_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025740UL)
#define CYREG_PERI_MS_PPU_FX317_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025744UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025750UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025754UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025758UL)
#define CYREG_PERI_MS_PPU_FX317_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002575CUL)
#define CYREG_PERI_MS_PPU_FX317_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025760UL)
#define CYREG_PERI_MS_PPU_FX317_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025764UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025770UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025774UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025778UL)
#define CYREG_PERI_MS_PPU_FX317_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002577CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX318)
  */
#define CYREG_PERI_MS_PPU_FX318_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025780UL)
#define CYREG_PERI_MS_PPU_FX318_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025784UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025790UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025794UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025798UL)
#define CYREG_PERI_MS_PPU_FX318_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002579CUL)
#define CYREG_PERI_MS_PPU_FX318_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400257A0UL)
#define CYREG_PERI_MS_PPU_FX318_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400257A4UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400257B0UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400257B4UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400257B8UL)
#define CYREG_PERI_MS_PPU_FX318_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400257BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX319)
  */
#define CYREG_PERI_MS_PPU_FX319_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400257C0UL)
#define CYREG_PERI_MS_PPU_FX319_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400257C4UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400257D0UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400257D4UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400257D8UL)
#define CYREG_PERI_MS_PPU_FX319_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400257DCUL)
#define CYREG_PERI_MS_PPU_FX319_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400257E0UL)
#define CYREG_PERI_MS_PPU_FX319_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400257E4UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400257F0UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400257F4UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400257F8UL)
#define CYREG_PERI_MS_PPU_FX319_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400257FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX320)
  */
#define CYREG_PERI_MS_PPU_FX320_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025800UL)
#define CYREG_PERI_MS_PPU_FX320_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025804UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025810UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025814UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025818UL)
#define CYREG_PERI_MS_PPU_FX320_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002581CUL)
#define CYREG_PERI_MS_PPU_FX320_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025820UL)
#define CYREG_PERI_MS_PPU_FX320_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025824UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025830UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025834UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025838UL)
#define CYREG_PERI_MS_PPU_FX320_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002583CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX321)
  */
#define CYREG_PERI_MS_PPU_FX321_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025840UL)
#define CYREG_PERI_MS_PPU_FX321_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025844UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025850UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025854UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025858UL)
#define CYREG_PERI_MS_PPU_FX321_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002585CUL)
#define CYREG_PERI_MS_PPU_FX321_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025860UL)
#define CYREG_PERI_MS_PPU_FX321_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025864UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025870UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025874UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025878UL)
#define CYREG_PERI_MS_PPU_FX321_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002587CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX322)
  */
#define CYREG_PERI_MS_PPU_FX322_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025880UL)
#define CYREG_PERI_MS_PPU_FX322_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025884UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025890UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025894UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025898UL)
#define CYREG_PERI_MS_PPU_FX322_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002589CUL)
#define CYREG_PERI_MS_PPU_FX322_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400258A0UL)
#define CYREG_PERI_MS_PPU_FX322_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400258A4UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400258B0UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400258B4UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400258B8UL)
#define CYREG_PERI_MS_PPU_FX322_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400258BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX323)
  */
#define CYREG_PERI_MS_PPU_FX323_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400258C0UL)
#define CYREG_PERI_MS_PPU_FX323_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400258C4UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400258D0UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400258D4UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400258D8UL)
#define CYREG_PERI_MS_PPU_FX323_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400258DCUL)
#define CYREG_PERI_MS_PPU_FX323_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400258E0UL)
#define CYREG_PERI_MS_PPU_FX323_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400258E4UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400258F0UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400258F4UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400258F8UL)
#define CYREG_PERI_MS_PPU_FX323_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400258FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX324)
  */
#define CYREG_PERI_MS_PPU_FX324_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025900UL)
#define CYREG_PERI_MS_PPU_FX324_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025904UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025910UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025914UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025918UL)
#define CYREG_PERI_MS_PPU_FX324_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002591CUL)
#define CYREG_PERI_MS_PPU_FX324_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025920UL)
#define CYREG_PERI_MS_PPU_FX324_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025924UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025930UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025934UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025938UL)
#define CYREG_PERI_MS_PPU_FX324_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002593CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX325)
  */
#define CYREG_PERI_MS_PPU_FX325_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025940UL)
#define CYREG_PERI_MS_PPU_FX325_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025944UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025950UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025954UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025958UL)
#define CYREG_PERI_MS_PPU_FX325_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002595CUL)
#define CYREG_PERI_MS_PPU_FX325_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025960UL)
#define CYREG_PERI_MS_PPU_FX325_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025964UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025970UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025974UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025978UL)
#define CYREG_PERI_MS_PPU_FX325_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002597CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX326)
  */
#define CYREG_PERI_MS_PPU_FX326_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025980UL)
#define CYREG_PERI_MS_PPU_FX326_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025984UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025990UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025994UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025998UL)
#define CYREG_PERI_MS_PPU_FX326_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002599CUL)
#define CYREG_PERI_MS_PPU_FX326_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400259A0UL)
#define CYREG_PERI_MS_PPU_FX326_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400259A4UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400259B0UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400259B4UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400259B8UL)
#define CYREG_PERI_MS_PPU_FX326_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400259BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX327)
  */
#define CYREG_PERI_MS_PPU_FX327_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400259C0UL)
#define CYREG_PERI_MS_PPU_FX327_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400259C4UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400259D0UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400259D4UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400259D8UL)
#define CYREG_PERI_MS_PPU_FX327_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400259DCUL)
#define CYREG_PERI_MS_PPU_FX327_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400259E0UL)
#define CYREG_PERI_MS_PPU_FX327_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400259E4UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400259F0UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400259F4UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400259F8UL)
#define CYREG_PERI_MS_PPU_FX327_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400259FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX328)
  */
#define CYREG_PERI_MS_PPU_FX328_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025A00UL)
#define CYREG_PERI_MS_PPU_FX328_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025A04UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025A10UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025A14UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025A18UL)
#define CYREG_PERI_MS_PPU_FX328_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025A1CUL)
#define CYREG_PERI_MS_PPU_FX328_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025A20UL)
#define CYREG_PERI_MS_PPU_FX328_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025A24UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025A30UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025A34UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025A38UL)
#define CYREG_PERI_MS_PPU_FX328_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX329)
  */
#define CYREG_PERI_MS_PPU_FX329_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025A40UL)
#define CYREG_PERI_MS_PPU_FX329_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025A44UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025A50UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025A54UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025A58UL)
#define CYREG_PERI_MS_PPU_FX329_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025A5CUL)
#define CYREG_PERI_MS_PPU_FX329_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025A60UL)
#define CYREG_PERI_MS_PPU_FX329_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025A64UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025A70UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025A74UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025A78UL)
#define CYREG_PERI_MS_PPU_FX329_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX330)
  */
#define CYREG_PERI_MS_PPU_FX330_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025A80UL)
#define CYREG_PERI_MS_PPU_FX330_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025A84UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025A90UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025A94UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025A98UL)
#define CYREG_PERI_MS_PPU_FX330_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025A9CUL)
#define CYREG_PERI_MS_PPU_FX330_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025AA0UL)
#define CYREG_PERI_MS_PPU_FX330_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025AA4UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025AB0UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025AB4UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025AB8UL)
#define CYREG_PERI_MS_PPU_FX330_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX331)
  */
#define CYREG_PERI_MS_PPU_FX331_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025AC0UL)
#define CYREG_PERI_MS_PPU_FX331_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025AC4UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025AD0UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025AD4UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025AD8UL)
#define CYREG_PERI_MS_PPU_FX331_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025ADCUL)
#define CYREG_PERI_MS_PPU_FX331_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025AE0UL)
#define CYREG_PERI_MS_PPU_FX331_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025AE4UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025AF0UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025AF4UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025AF8UL)
#define CYREG_PERI_MS_PPU_FX331_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX332)
  */
#define CYREG_PERI_MS_PPU_FX332_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025B00UL)
#define CYREG_PERI_MS_PPU_FX332_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025B04UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025B10UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025B14UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025B18UL)
#define CYREG_PERI_MS_PPU_FX332_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025B1CUL)
#define CYREG_PERI_MS_PPU_FX332_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025B20UL)
#define CYREG_PERI_MS_PPU_FX332_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025B24UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025B30UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025B34UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025B38UL)
#define CYREG_PERI_MS_PPU_FX332_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX333)
  */
#define CYREG_PERI_MS_PPU_FX333_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025B40UL)
#define CYREG_PERI_MS_PPU_FX333_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025B44UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025B50UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025B54UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025B58UL)
#define CYREG_PERI_MS_PPU_FX333_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025B5CUL)
#define CYREG_PERI_MS_PPU_FX333_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025B60UL)
#define CYREG_PERI_MS_PPU_FX333_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025B64UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025B70UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025B74UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025B78UL)
#define CYREG_PERI_MS_PPU_FX333_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX334)
  */
#define CYREG_PERI_MS_PPU_FX334_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025B80UL)
#define CYREG_PERI_MS_PPU_FX334_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025B84UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025B90UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025B94UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025B98UL)
#define CYREG_PERI_MS_PPU_FX334_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025B9CUL)
#define CYREG_PERI_MS_PPU_FX334_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025BA0UL)
#define CYREG_PERI_MS_PPU_FX334_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025BA4UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025BB0UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025BB4UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025BB8UL)
#define CYREG_PERI_MS_PPU_FX334_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX335)
  */
#define CYREG_PERI_MS_PPU_FX335_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025BC0UL)
#define CYREG_PERI_MS_PPU_FX335_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025BC4UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025BD0UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025BD4UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025BD8UL)
#define CYREG_PERI_MS_PPU_FX335_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025BDCUL)
#define CYREG_PERI_MS_PPU_FX335_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025BE0UL)
#define CYREG_PERI_MS_PPU_FX335_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025BE4UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025BF0UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025BF4UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025BF8UL)
#define CYREG_PERI_MS_PPU_FX335_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX336)
  */
#define CYREG_PERI_MS_PPU_FX336_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025C00UL)
#define CYREG_PERI_MS_PPU_FX336_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025C04UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025C10UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025C14UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025C18UL)
#define CYREG_PERI_MS_PPU_FX336_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025C1CUL)
#define CYREG_PERI_MS_PPU_FX336_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025C20UL)
#define CYREG_PERI_MS_PPU_FX336_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025C24UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025C30UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025C34UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025C38UL)
#define CYREG_PERI_MS_PPU_FX336_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX337)
  */
#define CYREG_PERI_MS_PPU_FX337_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025C40UL)
#define CYREG_PERI_MS_PPU_FX337_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025C44UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025C50UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025C54UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025C58UL)
#define CYREG_PERI_MS_PPU_FX337_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025C5CUL)
#define CYREG_PERI_MS_PPU_FX337_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025C60UL)
#define CYREG_PERI_MS_PPU_FX337_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025C64UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025C70UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025C74UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025C78UL)
#define CYREG_PERI_MS_PPU_FX337_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX338)
  */
#define CYREG_PERI_MS_PPU_FX338_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025C80UL)
#define CYREG_PERI_MS_PPU_FX338_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025C84UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025C90UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025C94UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025C98UL)
#define CYREG_PERI_MS_PPU_FX338_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025C9CUL)
#define CYREG_PERI_MS_PPU_FX338_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025CA0UL)
#define CYREG_PERI_MS_PPU_FX338_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025CA4UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025CB0UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025CB4UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025CB8UL)
#define CYREG_PERI_MS_PPU_FX338_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX339)
  */
#define CYREG_PERI_MS_PPU_FX339_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025CC0UL)
#define CYREG_PERI_MS_PPU_FX339_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025CC4UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025CD0UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025CD4UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025CD8UL)
#define CYREG_PERI_MS_PPU_FX339_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025CDCUL)
#define CYREG_PERI_MS_PPU_FX339_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025CE0UL)
#define CYREG_PERI_MS_PPU_FX339_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025CE4UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025CF0UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025CF4UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025CF8UL)
#define CYREG_PERI_MS_PPU_FX339_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX340)
  */
#define CYREG_PERI_MS_PPU_FX340_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025D00UL)
#define CYREG_PERI_MS_PPU_FX340_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025D04UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025D10UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025D14UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025D18UL)
#define CYREG_PERI_MS_PPU_FX340_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025D1CUL)
#define CYREG_PERI_MS_PPU_FX340_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025D20UL)
#define CYREG_PERI_MS_PPU_FX340_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025D24UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025D30UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025D34UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025D38UL)
#define CYREG_PERI_MS_PPU_FX340_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX341)
  */
#define CYREG_PERI_MS_PPU_FX341_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025D40UL)
#define CYREG_PERI_MS_PPU_FX341_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025D44UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025D50UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025D54UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025D58UL)
#define CYREG_PERI_MS_PPU_FX341_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025D5CUL)
#define CYREG_PERI_MS_PPU_FX341_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025D60UL)
#define CYREG_PERI_MS_PPU_FX341_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025D64UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025D70UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025D74UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025D78UL)
#define CYREG_PERI_MS_PPU_FX341_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX342)
  */
#define CYREG_PERI_MS_PPU_FX342_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025D80UL)
#define CYREG_PERI_MS_PPU_FX342_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025D84UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025D90UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025D94UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025D98UL)
#define CYREG_PERI_MS_PPU_FX342_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025D9CUL)
#define CYREG_PERI_MS_PPU_FX342_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025DA0UL)
#define CYREG_PERI_MS_PPU_FX342_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025DA4UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025DB0UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025DB4UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025DB8UL)
#define CYREG_PERI_MS_PPU_FX342_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX343)
  */
#define CYREG_PERI_MS_PPU_FX343_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025DC0UL)
#define CYREG_PERI_MS_PPU_FX343_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025DC4UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025DD0UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025DD4UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025DD8UL)
#define CYREG_PERI_MS_PPU_FX343_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025DDCUL)
#define CYREG_PERI_MS_PPU_FX343_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025DE0UL)
#define CYREG_PERI_MS_PPU_FX343_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025DE4UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025DF0UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025DF4UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025DF8UL)
#define CYREG_PERI_MS_PPU_FX343_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX344)
  */
#define CYREG_PERI_MS_PPU_FX344_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025E00UL)
#define CYREG_PERI_MS_PPU_FX344_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025E04UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025E10UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025E14UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025E18UL)
#define CYREG_PERI_MS_PPU_FX344_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025E1CUL)
#define CYREG_PERI_MS_PPU_FX344_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025E20UL)
#define CYREG_PERI_MS_PPU_FX344_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025E24UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025E30UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025E34UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025E38UL)
#define CYREG_PERI_MS_PPU_FX344_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX345)
  */
#define CYREG_PERI_MS_PPU_FX345_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025E40UL)
#define CYREG_PERI_MS_PPU_FX345_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025E44UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025E50UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025E54UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025E58UL)
#define CYREG_PERI_MS_PPU_FX345_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025E5CUL)
#define CYREG_PERI_MS_PPU_FX345_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025E60UL)
#define CYREG_PERI_MS_PPU_FX345_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025E64UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025E70UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025E74UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025E78UL)
#define CYREG_PERI_MS_PPU_FX345_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX346)
  */
#define CYREG_PERI_MS_PPU_FX346_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025E80UL)
#define CYREG_PERI_MS_PPU_FX346_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025E84UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025E90UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025E94UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025E98UL)
#define CYREG_PERI_MS_PPU_FX346_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025E9CUL)
#define CYREG_PERI_MS_PPU_FX346_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025EA0UL)
#define CYREG_PERI_MS_PPU_FX346_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025EA4UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025EB0UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025EB4UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025EB8UL)
#define CYREG_PERI_MS_PPU_FX346_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX347)
  */
#define CYREG_PERI_MS_PPU_FX347_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025EC0UL)
#define CYREG_PERI_MS_PPU_FX347_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025EC4UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025ED0UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025ED4UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025ED8UL)
#define CYREG_PERI_MS_PPU_FX347_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025EDCUL)
#define CYREG_PERI_MS_PPU_FX347_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025EE0UL)
#define CYREG_PERI_MS_PPU_FX347_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025EE4UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025EF0UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025EF4UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025EF8UL)
#define CYREG_PERI_MS_PPU_FX347_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX348)
  */
#define CYREG_PERI_MS_PPU_FX348_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025F00UL)
#define CYREG_PERI_MS_PPU_FX348_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025F04UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025F10UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025F14UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025F18UL)
#define CYREG_PERI_MS_PPU_FX348_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025F1CUL)
#define CYREG_PERI_MS_PPU_FX348_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025F20UL)
#define CYREG_PERI_MS_PPU_FX348_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025F24UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025F30UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025F34UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025F38UL)
#define CYREG_PERI_MS_PPU_FX348_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX349)
  */
#define CYREG_PERI_MS_PPU_FX349_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025F40UL)
#define CYREG_PERI_MS_PPU_FX349_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025F44UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025F50UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025F54UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025F58UL)
#define CYREG_PERI_MS_PPU_FX349_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025F5CUL)
#define CYREG_PERI_MS_PPU_FX349_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025F60UL)
#define CYREG_PERI_MS_PPU_FX349_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025F64UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025F70UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025F74UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025F78UL)
#define CYREG_PERI_MS_PPU_FX349_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX350)
  */
#define CYREG_PERI_MS_PPU_FX350_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025F80UL)
#define CYREG_PERI_MS_PPU_FX350_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025F84UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025F90UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025F94UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025F98UL)
#define CYREG_PERI_MS_PPU_FX350_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025F9CUL)
#define CYREG_PERI_MS_PPU_FX350_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025FA0UL)
#define CYREG_PERI_MS_PPU_FX350_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025FA4UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025FB0UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025FB4UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025FB8UL)
#define CYREG_PERI_MS_PPU_FX350_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX351)
  */
#define CYREG_PERI_MS_PPU_FX351_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40025FC0UL)
#define CYREG_PERI_MS_PPU_FX351_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40025FC4UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40025FD0UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40025FD4UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40025FD8UL)
#define CYREG_PERI_MS_PPU_FX351_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40025FDCUL)
#define CYREG_PERI_MS_PPU_FX351_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40025FE0UL)
#define CYREG_PERI_MS_PPU_FX351_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40025FE4UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40025FF0UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40025FF4UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40025FF8UL)
#define CYREG_PERI_MS_PPU_FX351_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40025FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX352)
  */
#define CYREG_PERI_MS_PPU_FX352_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026000UL)
#define CYREG_PERI_MS_PPU_FX352_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026004UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026010UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026014UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026018UL)
#define CYREG_PERI_MS_PPU_FX352_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002601CUL)
#define CYREG_PERI_MS_PPU_FX352_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026020UL)
#define CYREG_PERI_MS_PPU_FX352_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026024UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026030UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026034UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026038UL)
#define CYREG_PERI_MS_PPU_FX352_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002603CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX353)
  */
#define CYREG_PERI_MS_PPU_FX353_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026040UL)
#define CYREG_PERI_MS_PPU_FX353_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026044UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026050UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026054UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026058UL)
#define CYREG_PERI_MS_PPU_FX353_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002605CUL)
#define CYREG_PERI_MS_PPU_FX353_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026060UL)
#define CYREG_PERI_MS_PPU_FX353_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026064UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026070UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026074UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026078UL)
#define CYREG_PERI_MS_PPU_FX353_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002607CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX354)
  */
#define CYREG_PERI_MS_PPU_FX354_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026080UL)
#define CYREG_PERI_MS_PPU_FX354_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026084UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026090UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026094UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026098UL)
#define CYREG_PERI_MS_PPU_FX354_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002609CUL)
#define CYREG_PERI_MS_PPU_FX354_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400260A0UL)
#define CYREG_PERI_MS_PPU_FX354_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400260A4UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400260B0UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400260B4UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400260B8UL)
#define CYREG_PERI_MS_PPU_FX354_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400260BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX355)
  */
#define CYREG_PERI_MS_PPU_FX355_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400260C0UL)
#define CYREG_PERI_MS_PPU_FX355_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400260C4UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400260D0UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400260D4UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400260D8UL)
#define CYREG_PERI_MS_PPU_FX355_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400260DCUL)
#define CYREG_PERI_MS_PPU_FX355_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400260E0UL)
#define CYREG_PERI_MS_PPU_FX355_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400260E4UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400260F0UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400260F4UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400260F8UL)
#define CYREG_PERI_MS_PPU_FX355_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400260FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX356)
  */
#define CYREG_PERI_MS_PPU_FX356_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026100UL)
#define CYREG_PERI_MS_PPU_FX356_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026104UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026110UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026114UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026118UL)
#define CYREG_PERI_MS_PPU_FX356_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002611CUL)
#define CYREG_PERI_MS_PPU_FX356_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026120UL)
#define CYREG_PERI_MS_PPU_FX356_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026124UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026130UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026134UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026138UL)
#define CYREG_PERI_MS_PPU_FX356_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002613CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX357)
  */
#define CYREG_PERI_MS_PPU_FX357_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026140UL)
#define CYREG_PERI_MS_PPU_FX357_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026144UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026150UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026154UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026158UL)
#define CYREG_PERI_MS_PPU_FX357_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002615CUL)
#define CYREG_PERI_MS_PPU_FX357_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026160UL)
#define CYREG_PERI_MS_PPU_FX357_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026164UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026170UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026174UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026178UL)
#define CYREG_PERI_MS_PPU_FX357_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002617CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX358)
  */
#define CYREG_PERI_MS_PPU_FX358_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026180UL)
#define CYREG_PERI_MS_PPU_FX358_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026184UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026190UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026194UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026198UL)
#define CYREG_PERI_MS_PPU_FX358_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002619CUL)
#define CYREG_PERI_MS_PPU_FX358_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400261A0UL)
#define CYREG_PERI_MS_PPU_FX358_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400261A4UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400261B0UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400261B4UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400261B8UL)
#define CYREG_PERI_MS_PPU_FX358_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400261BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX359)
  */
#define CYREG_PERI_MS_PPU_FX359_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400261C0UL)
#define CYREG_PERI_MS_PPU_FX359_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400261C4UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400261D0UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400261D4UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400261D8UL)
#define CYREG_PERI_MS_PPU_FX359_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400261DCUL)
#define CYREG_PERI_MS_PPU_FX359_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400261E0UL)
#define CYREG_PERI_MS_PPU_FX359_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400261E4UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400261F0UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400261F4UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400261F8UL)
#define CYREG_PERI_MS_PPU_FX359_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400261FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX360)
  */
#define CYREG_PERI_MS_PPU_FX360_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026200UL)
#define CYREG_PERI_MS_PPU_FX360_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026204UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026210UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026214UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026218UL)
#define CYREG_PERI_MS_PPU_FX360_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002621CUL)
#define CYREG_PERI_MS_PPU_FX360_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026220UL)
#define CYREG_PERI_MS_PPU_FX360_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026224UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026230UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026234UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026238UL)
#define CYREG_PERI_MS_PPU_FX360_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002623CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX361)
  */
#define CYREG_PERI_MS_PPU_FX361_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026240UL)
#define CYREG_PERI_MS_PPU_FX361_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026244UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026250UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026254UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026258UL)
#define CYREG_PERI_MS_PPU_FX361_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002625CUL)
#define CYREG_PERI_MS_PPU_FX361_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026260UL)
#define CYREG_PERI_MS_PPU_FX361_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026264UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026270UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026274UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026278UL)
#define CYREG_PERI_MS_PPU_FX361_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002627CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX362)
  */
#define CYREG_PERI_MS_PPU_FX362_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026280UL)
#define CYREG_PERI_MS_PPU_FX362_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026284UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026290UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026294UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026298UL)
#define CYREG_PERI_MS_PPU_FX362_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002629CUL)
#define CYREG_PERI_MS_PPU_FX362_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400262A0UL)
#define CYREG_PERI_MS_PPU_FX362_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400262A4UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400262B0UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400262B4UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400262B8UL)
#define CYREG_PERI_MS_PPU_FX362_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400262BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX363)
  */
#define CYREG_PERI_MS_PPU_FX363_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400262C0UL)
#define CYREG_PERI_MS_PPU_FX363_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400262C4UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400262D0UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400262D4UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400262D8UL)
#define CYREG_PERI_MS_PPU_FX363_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400262DCUL)
#define CYREG_PERI_MS_PPU_FX363_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400262E0UL)
#define CYREG_PERI_MS_PPU_FX363_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400262E4UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400262F0UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400262F4UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400262F8UL)
#define CYREG_PERI_MS_PPU_FX363_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400262FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX364)
  */
#define CYREG_PERI_MS_PPU_FX364_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026300UL)
#define CYREG_PERI_MS_PPU_FX364_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026304UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026310UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026314UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026318UL)
#define CYREG_PERI_MS_PPU_FX364_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002631CUL)
#define CYREG_PERI_MS_PPU_FX364_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026320UL)
#define CYREG_PERI_MS_PPU_FX364_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026324UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026330UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026334UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026338UL)
#define CYREG_PERI_MS_PPU_FX364_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002633CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX365)
  */
#define CYREG_PERI_MS_PPU_FX365_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026340UL)
#define CYREG_PERI_MS_PPU_FX365_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026344UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026350UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026354UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026358UL)
#define CYREG_PERI_MS_PPU_FX365_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002635CUL)
#define CYREG_PERI_MS_PPU_FX365_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026360UL)
#define CYREG_PERI_MS_PPU_FX365_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026364UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026370UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026374UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026378UL)
#define CYREG_PERI_MS_PPU_FX365_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002637CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX366)
  */
#define CYREG_PERI_MS_PPU_FX366_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026380UL)
#define CYREG_PERI_MS_PPU_FX366_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026384UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026390UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026394UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026398UL)
#define CYREG_PERI_MS_PPU_FX366_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002639CUL)
#define CYREG_PERI_MS_PPU_FX366_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400263A0UL)
#define CYREG_PERI_MS_PPU_FX366_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400263A4UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400263B0UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400263B4UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400263B8UL)
#define CYREG_PERI_MS_PPU_FX366_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400263BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX367)
  */
#define CYREG_PERI_MS_PPU_FX367_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400263C0UL)
#define CYREG_PERI_MS_PPU_FX367_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400263C4UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400263D0UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400263D4UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400263D8UL)
#define CYREG_PERI_MS_PPU_FX367_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400263DCUL)
#define CYREG_PERI_MS_PPU_FX367_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400263E0UL)
#define CYREG_PERI_MS_PPU_FX367_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400263E4UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400263F0UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400263F4UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400263F8UL)
#define CYREG_PERI_MS_PPU_FX367_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400263FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX368)
  */
#define CYREG_PERI_MS_PPU_FX368_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026400UL)
#define CYREG_PERI_MS_PPU_FX368_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026404UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026410UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026414UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026418UL)
#define CYREG_PERI_MS_PPU_FX368_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002641CUL)
#define CYREG_PERI_MS_PPU_FX368_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026420UL)
#define CYREG_PERI_MS_PPU_FX368_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026424UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026430UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026434UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026438UL)
#define CYREG_PERI_MS_PPU_FX368_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002643CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX369)
  */
#define CYREG_PERI_MS_PPU_FX369_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026440UL)
#define CYREG_PERI_MS_PPU_FX369_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026444UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026450UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026454UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026458UL)
#define CYREG_PERI_MS_PPU_FX369_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002645CUL)
#define CYREG_PERI_MS_PPU_FX369_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026460UL)
#define CYREG_PERI_MS_PPU_FX369_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026464UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026470UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026474UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026478UL)
#define CYREG_PERI_MS_PPU_FX369_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002647CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX370)
  */
#define CYREG_PERI_MS_PPU_FX370_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026480UL)
#define CYREG_PERI_MS_PPU_FX370_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026484UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026490UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026494UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026498UL)
#define CYREG_PERI_MS_PPU_FX370_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002649CUL)
#define CYREG_PERI_MS_PPU_FX370_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400264A0UL)
#define CYREG_PERI_MS_PPU_FX370_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400264A4UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400264B0UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400264B4UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400264B8UL)
#define CYREG_PERI_MS_PPU_FX370_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400264BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX371)
  */
#define CYREG_PERI_MS_PPU_FX371_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400264C0UL)
#define CYREG_PERI_MS_PPU_FX371_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400264C4UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400264D0UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400264D4UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400264D8UL)
#define CYREG_PERI_MS_PPU_FX371_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400264DCUL)
#define CYREG_PERI_MS_PPU_FX371_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400264E0UL)
#define CYREG_PERI_MS_PPU_FX371_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400264E4UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400264F0UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400264F4UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400264F8UL)
#define CYREG_PERI_MS_PPU_FX371_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400264FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX372)
  */
#define CYREG_PERI_MS_PPU_FX372_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026500UL)
#define CYREG_PERI_MS_PPU_FX372_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026504UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026510UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026514UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026518UL)
#define CYREG_PERI_MS_PPU_FX372_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002651CUL)
#define CYREG_PERI_MS_PPU_FX372_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026520UL)
#define CYREG_PERI_MS_PPU_FX372_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026524UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026530UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026534UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026538UL)
#define CYREG_PERI_MS_PPU_FX372_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002653CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX373)
  */
#define CYREG_PERI_MS_PPU_FX373_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026540UL)
#define CYREG_PERI_MS_PPU_FX373_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026544UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026550UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026554UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026558UL)
#define CYREG_PERI_MS_PPU_FX373_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002655CUL)
#define CYREG_PERI_MS_PPU_FX373_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026560UL)
#define CYREG_PERI_MS_PPU_FX373_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026564UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026570UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026574UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026578UL)
#define CYREG_PERI_MS_PPU_FX373_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002657CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX374)
  */
#define CYREG_PERI_MS_PPU_FX374_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026580UL)
#define CYREG_PERI_MS_PPU_FX374_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026584UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026590UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026594UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026598UL)
#define CYREG_PERI_MS_PPU_FX374_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002659CUL)
#define CYREG_PERI_MS_PPU_FX374_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400265A0UL)
#define CYREG_PERI_MS_PPU_FX374_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400265A4UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400265B0UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400265B4UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400265B8UL)
#define CYREG_PERI_MS_PPU_FX374_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400265BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX375)
  */
#define CYREG_PERI_MS_PPU_FX375_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400265C0UL)
#define CYREG_PERI_MS_PPU_FX375_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400265C4UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400265D0UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400265D4UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400265D8UL)
#define CYREG_PERI_MS_PPU_FX375_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400265DCUL)
#define CYREG_PERI_MS_PPU_FX375_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400265E0UL)
#define CYREG_PERI_MS_PPU_FX375_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400265E4UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400265F0UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400265F4UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400265F8UL)
#define CYREG_PERI_MS_PPU_FX375_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400265FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX376)
  */
#define CYREG_PERI_MS_PPU_FX376_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026600UL)
#define CYREG_PERI_MS_PPU_FX376_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026604UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026610UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026614UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026618UL)
#define CYREG_PERI_MS_PPU_FX376_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002661CUL)
#define CYREG_PERI_MS_PPU_FX376_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026620UL)
#define CYREG_PERI_MS_PPU_FX376_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026624UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026630UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026634UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026638UL)
#define CYREG_PERI_MS_PPU_FX376_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002663CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX377)
  */
#define CYREG_PERI_MS_PPU_FX377_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026640UL)
#define CYREG_PERI_MS_PPU_FX377_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026644UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026650UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026654UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026658UL)
#define CYREG_PERI_MS_PPU_FX377_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002665CUL)
#define CYREG_PERI_MS_PPU_FX377_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026660UL)
#define CYREG_PERI_MS_PPU_FX377_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026664UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026670UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026674UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026678UL)
#define CYREG_PERI_MS_PPU_FX377_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002667CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX378)
  */
#define CYREG_PERI_MS_PPU_FX378_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026680UL)
#define CYREG_PERI_MS_PPU_FX378_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026684UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026690UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026694UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026698UL)
#define CYREG_PERI_MS_PPU_FX378_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002669CUL)
#define CYREG_PERI_MS_PPU_FX378_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400266A0UL)
#define CYREG_PERI_MS_PPU_FX378_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400266A4UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400266B0UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400266B4UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400266B8UL)
#define CYREG_PERI_MS_PPU_FX378_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400266BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX379)
  */
#define CYREG_PERI_MS_PPU_FX379_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400266C0UL)
#define CYREG_PERI_MS_PPU_FX379_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400266C4UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400266D0UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400266D4UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400266D8UL)
#define CYREG_PERI_MS_PPU_FX379_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400266DCUL)
#define CYREG_PERI_MS_PPU_FX379_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400266E0UL)
#define CYREG_PERI_MS_PPU_FX379_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400266E4UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400266F0UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400266F4UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400266F8UL)
#define CYREG_PERI_MS_PPU_FX379_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400266FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX380)
  */
#define CYREG_PERI_MS_PPU_FX380_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026700UL)
#define CYREG_PERI_MS_PPU_FX380_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026704UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026710UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026714UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026718UL)
#define CYREG_PERI_MS_PPU_FX380_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002671CUL)
#define CYREG_PERI_MS_PPU_FX380_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026720UL)
#define CYREG_PERI_MS_PPU_FX380_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026724UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026730UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026734UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026738UL)
#define CYREG_PERI_MS_PPU_FX380_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002673CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX381)
  */
#define CYREG_PERI_MS_PPU_FX381_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026740UL)
#define CYREG_PERI_MS_PPU_FX381_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026744UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026750UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026754UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026758UL)
#define CYREG_PERI_MS_PPU_FX381_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002675CUL)
#define CYREG_PERI_MS_PPU_FX381_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026760UL)
#define CYREG_PERI_MS_PPU_FX381_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026764UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026770UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026774UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026778UL)
#define CYREG_PERI_MS_PPU_FX381_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002677CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX382)
  */
#define CYREG_PERI_MS_PPU_FX382_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026780UL)
#define CYREG_PERI_MS_PPU_FX382_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026784UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026790UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026794UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026798UL)
#define CYREG_PERI_MS_PPU_FX382_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002679CUL)
#define CYREG_PERI_MS_PPU_FX382_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400267A0UL)
#define CYREG_PERI_MS_PPU_FX382_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400267A4UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400267B0UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400267B4UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400267B8UL)
#define CYREG_PERI_MS_PPU_FX382_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400267BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX383)
  */
#define CYREG_PERI_MS_PPU_FX383_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400267C0UL)
#define CYREG_PERI_MS_PPU_FX383_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400267C4UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400267D0UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400267D4UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400267D8UL)
#define CYREG_PERI_MS_PPU_FX383_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400267DCUL)
#define CYREG_PERI_MS_PPU_FX383_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400267E0UL)
#define CYREG_PERI_MS_PPU_FX383_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400267E4UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400267F0UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400267F4UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400267F8UL)
#define CYREG_PERI_MS_PPU_FX383_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400267FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX384)
  */
#define CYREG_PERI_MS_PPU_FX384_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026800UL)
#define CYREG_PERI_MS_PPU_FX384_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026804UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026810UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026814UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026818UL)
#define CYREG_PERI_MS_PPU_FX384_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002681CUL)
#define CYREG_PERI_MS_PPU_FX384_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026820UL)
#define CYREG_PERI_MS_PPU_FX384_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026824UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026830UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026834UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026838UL)
#define CYREG_PERI_MS_PPU_FX384_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002683CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX385)
  */
#define CYREG_PERI_MS_PPU_FX385_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026840UL)
#define CYREG_PERI_MS_PPU_FX385_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026844UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026850UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026854UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026858UL)
#define CYREG_PERI_MS_PPU_FX385_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002685CUL)
#define CYREG_PERI_MS_PPU_FX385_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026860UL)
#define CYREG_PERI_MS_PPU_FX385_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026864UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026870UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026874UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026878UL)
#define CYREG_PERI_MS_PPU_FX385_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002687CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX386)
  */
#define CYREG_PERI_MS_PPU_FX386_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026880UL)
#define CYREG_PERI_MS_PPU_FX386_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026884UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026890UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026894UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026898UL)
#define CYREG_PERI_MS_PPU_FX386_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002689CUL)
#define CYREG_PERI_MS_PPU_FX386_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400268A0UL)
#define CYREG_PERI_MS_PPU_FX386_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400268A4UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400268B0UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400268B4UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400268B8UL)
#define CYREG_PERI_MS_PPU_FX386_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400268BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX387)
  */
#define CYREG_PERI_MS_PPU_FX387_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400268C0UL)
#define CYREG_PERI_MS_PPU_FX387_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400268C4UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400268D0UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400268D4UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400268D8UL)
#define CYREG_PERI_MS_PPU_FX387_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400268DCUL)
#define CYREG_PERI_MS_PPU_FX387_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400268E0UL)
#define CYREG_PERI_MS_PPU_FX387_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400268E4UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400268F0UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400268F4UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400268F8UL)
#define CYREG_PERI_MS_PPU_FX387_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400268FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX388)
  */
#define CYREG_PERI_MS_PPU_FX388_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026900UL)
#define CYREG_PERI_MS_PPU_FX388_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026904UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026910UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026914UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026918UL)
#define CYREG_PERI_MS_PPU_FX388_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002691CUL)
#define CYREG_PERI_MS_PPU_FX388_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026920UL)
#define CYREG_PERI_MS_PPU_FX388_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026924UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026930UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026934UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026938UL)
#define CYREG_PERI_MS_PPU_FX388_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002693CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX389)
  */
#define CYREG_PERI_MS_PPU_FX389_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026940UL)
#define CYREG_PERI_MS_PPU_FX389_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026944UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026950UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026954UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026958UL)
#define CYREG_PERI_MS_PPU_FX389_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002695CUL)
#define CYREG_PERI_MS_PPU_FX389_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026960UL)
#define CYREG_PERI_MS_PPU_FX389_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026964UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026970UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026974UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026978UL)
#define CYREG_PERI_MS_PPU_FX389_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002697CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX390)
  */
#define CYREG_PERI_MS_PPU_FX390_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026980UL)
#define CYREG_PERI_MS_PPU_FX390_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026984UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026990UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026994UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026998UL)
#define CYREG_PERI_MS_PPU_FX390_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002699CUL)
#define CYREG_PERI_MS_PPU_FX390_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400269A0UL)
#define CYREG_PERI_MS_PPU_FX390_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400269A4UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400269B0UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400269B4UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400269B8UL)
#define CYREG_PERI_MS_PPU_FX390_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400269BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX391)
  */
#define CYREG_PERI_MS_PPU_FX391_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400269C0UL)
#define CYREG_PERI_MS_PPU_FX391_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400269C4UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400269D0UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400269D4UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400269D8UL)
#define CYREG_PERI_MS_PPU_FX391_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400269DCUL)
#define CYREG_PERI_MS_PPU_FX391_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400269E0UL)
#define CYREG_PERI_MS_PPU_FX391_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400269E4UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400269F0UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400269F4UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400269F8UL)
#define CYREG_PERI_MS_PPU_FX391_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400269FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX392)
  */
#define CYREG_PERI_MS_PPU_FX392_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026A00UL)
#define CYREG_PERI_MS_PPU_FX392_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026A04UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026A10UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026A14UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026A18UL)
#define CYREG_PERI_MS_PPU_FX392_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026A1CUL)
#define CYREG_PERI_MS_PPU_FX392_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026A20UL)
#define CYREG_PERI_MS_PPU_FX392_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026A24UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026A30UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026A34UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026A38UL)
#define CYREG_PERI_MS_PPU_FX392_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX393)
  */
#define CYREG_PERI_MS_PPU_FX393_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026A40UL)
#define CYREG_PERI_MS_PPU_FX393_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026A44UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026A50UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026A54UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026A58UL)
#define CYREG_PERI_MS_PPU_FX393_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026A5CUL)
#define CYREG_PERI_MS_PPU_FX393_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026A60UL)
#define CYREG_PERI_MS_PPU_FX393_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026A64UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026A70UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026A74UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026A78UL)
#define CYREG_PERI_MS_PPU_FX393_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX394)
  */
#define CYREG_PERI_MS_PPU_FX394_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026A80UL)
#define CYREG_PERI_MS_PPU_FX394_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026A84UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026A90UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026A94UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026A98UL)
#define CYREG_PERI_MS_PPU_FX394_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026A9CUL)
#define CYREG_PERI_MS_PPU_FX394_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026AA0UL)
#define CYREG_PERI_MS_PPU_FX394_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026AA4UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026AB0UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026AB4UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026AB8UL)
#define CYREG_PERI_MS_PPU_FX394_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX395)
  */
#define CYREG_PERI_MS_PPU_FX395_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026AC0UL)
#define CYREG_PERI_MS_PPU_FX395_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026AC4UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026AD0UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026AD4UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026AD8UL)
#define CYREG_PERI_MS_PPU_FX395_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026ADCUL)
#define CYREG_PERI_MS_PPU_FX395_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026AE0UL)
#define CYREG_PERI_MS_PPU_FX395_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026AE4UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026AF0UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026AF4UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026AF8UL)
#define CYREG_PERI_MS_PPU_FX395_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX396)
  */
#define CYREG_PERI_MS_PPU_FX396_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026B00UL)
#define CYREG_PERI_MS_PPU_FX396_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026B04UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026B10UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026B14UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026B18UL)
#define CYREG_PERI_MS_PPU_FX396_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026B1CUL)
#define CYREG_PERI_MS_PPU_FX396_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026B20UL)
#define CYREG_PERI_MS_PPU_FX396_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026B24UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026B30UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026B34UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026B38UL)
#define CYREG_PERI_MS_PPU_FX396_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX397)
  */
#define CYREG_PERI_MS_PPU_FX397_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026B40UL)
#define CYREG_PERI_MS_PPU_FX397_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026B44UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026B50UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026B54UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026B58UL)
#define CYREG_PERI_MS_PPU_FX397_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026B5CUL)
#define CYREG_PERI_MS_PPU_FX397_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026B60UL)
#define CYREG_PERI_MS_PPU_FX397_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026B64UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026B70UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026B74UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026B78UL)
#define CYREG_PERI_MS_PPU_FX397_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX398)
  */
#define CYREG_PERI_MS_PPU_FX398_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026B80UL)
#define CYREG_PERI_MS_PPU_FX398_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026B84UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026B90UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026B94UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026B98UL)
#define CYREG_PERI_MS_PPU_FX398_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026B9CUL)
#define CYREG_PERI_MS_PPU_FX398_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026BA0UL)
#define CYREG_PERI_MS_PPU_FX398_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026BA4UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026BB0UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026BB4UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026BB8UL)
#define CYREG_PERI_MS_PPU_FX398_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX399)
  */
#define CYREG_PERI_MS_PPU_FX399_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026BC0UL)
#define CYREG_PERI_MS_PPU_FX399_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026BC4UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026BD0UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026BD4UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026BD8UL)
#define CYREG_PERI_MS_PPU_FX399_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026BDCUL)
#define CYREG_PERI_MS_PPU_FX399_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026BE0UL)
#define CYREG_PERI_MS_PPU_FX399_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026BE4UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026BF0UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026BF4UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026BF8UL)
#define CYREG_PERI_MS_PPU_FX399_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX400)
  */
#define CYREG_PERI_MS_PPU_FX400_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026C00UL)
#define CYREG_PERI_MS_PPU_FX400_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026C04UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026C10UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026C14UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026C18UL)
#define CYREG_PERI_MS_PPU_FX400_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026C1CUL)
#define CYREG_PERI_MS_PPU_FX400_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026C20UL)
#define CYREG_PERI_MS_PPU_FX400_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026C24UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026C30UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026C34UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026C38UL)
#define CYREG_PERI_MS_PPU_FX400_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX401)
  */
#define CYREG_PERI_MS_PPU_FX401_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026C40UL)
#define CYREG_PERI_MS_PPU_FX401_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026C44UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026C50UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026C54UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026C58UL)
#define CYREG_PERI_MS_PPU_FX401_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026C5CUL)
#define CYREG_PERI_MS_PPU_FX401_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026C60UL)
#define CYREG_PERI_MS_PPU_FX401_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026C64UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026C70UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026C74UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026C78UL)
#define CYREG_PERI_MS_PPU_FX401_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX402)
  */
#define CYREG_PERI_MS_PPU_FX402_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026C80UL)
#define CYREG_PERI_MS_PPU_FX402_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026C84UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026C90UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026C94UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026C98UL)
#define CYREG_PERI_MS_PPU_FX402_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026C9CUL)
#define CYREG_PERI_MS_PPU_FX402_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026CA0UL)
#define CYREG_PERI_MS_PPU_FX402_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026CA4UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026CB0UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026CB4UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026CB8UL)
#define CYREG_PERI_MS_PPU_FX402_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX403)
  */
#define CYREG_PERI_MS_PPU_FX403_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026CC0UL)
#define CYREG_PERI_MS_PPU_FX403_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026CC4UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026CD0UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026CD4UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026CD8UL)
#define CYREG_PERI_MS_PPU_FX403_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026CDCUL)
#define CYREG_PERI_MS_PPU_FX403_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026CE0UL)
#define CYREG_PERI_MS_PPU_FX403_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026CE4UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026CF0UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026CF4UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026CF8UL)
#define CYREG_PERI_MS_PPU_FX403_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX404)
  */
#define CYREG_PERI_MS_PPU_FX404_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026D00UL)
#define CYREG_PERI_MS_PPU_FX404_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026D04UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026D10UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026D14UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026D18UL)
#define CYREG_PERI_MS_PPU_FX404_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026D1CUL)
#define CYREG_PERI_MS_PPU_FX404_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026D20UL)
#define CYREG_PERI_MS_PPU_FX404_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026D24UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026D30UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026D34UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026D38UL)
#define CYREG_PERI_MS_PPU_FX404_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX405)
  */
#define CYREG_PERI_MS_PPU_FX405_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026D40UL)
#define CYREG_PERI_MS_PPU_FX405_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026D44UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026D50UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026D54UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026D58UL)
#define CYREG_PERI_MS_PPU_FX405_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026D5CUL)
#define CYREG_PERI_MS_PPU_FX405_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026D60UL)
#define CYREG_PERI_MS_PPU_FX405_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026D64UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026D70UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026D74UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026D78UL)
#define CYREG_PERI_MS_PPU_FX405_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX406)
  */
#define CYREG_PERI_MS_PPU_FX406_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026D80UL)
#define CYREG_PERI_MS_PPU_FX406_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026D84UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026D90UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026D94UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026D98UL)
#define CYREG_PERI_MS_PPU_FX406_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026D9CUL)
#define CYREG_PERI_MS_PPU_FX406_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026DA0UL)
#define CYREG_PERI_MS_PPU_FX406_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026DA4UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026DB0UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026DB4UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026DB8UL)
#define CYREG_PERI_MS_PPU_FX406_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX407)
  */
#define CYREG_PERI_MS_PPU_FX407_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026DC0UL)
#define CYREG_PERI_MS_PPU_FX407_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026DC4UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026DD0UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026DD4UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026DD8UL)
#define CYREG_PERI_MS_PPU_FX407_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026DDCUL)
#define CYREG_PERI_MS_PPU_FX407_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026DE0UL)
#define CYREG_PERI_MS_PPU_FX407_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026DE4UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026DF0UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026DF4UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026DF8UL)
#define CYREG_PERI_MS_PPU_FX407_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX408)
  */
#define CYREG_PERI_MS_PPU_FX408_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026E00UL)
#define CYREG_PERI_MS_PPU_FX408_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026E04UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026E10UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026E14UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026E18UL)
#define CYREG_PERI_MS_PPU_FX408_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026E1CUL)
#define CYREG_PERI_MS_PPU_FX408_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026E20UL)
#define CYREG_PERI_MS_PPU_FX408_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026E24UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026E30UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026E34UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026E38UL)
#define CYREG_PERI_MS_PPU_FX408_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX409)
  */
#define CYREG_PERI_MS_PPU_FX409_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026E40UL)
#define CYREG_PERI_MS_PPU_FX409_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026E44UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026E50UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026E54UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026E58UL)
#define CYREG_PERI_MS_PPU_FX409_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026E5CUL)
#define CYREG_PERI_MS_PPU_FX409_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026E60UL)
#define CYREG_PERI_MS_PPU_FX409_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026E64UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026E70UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026E74UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026E78UL)
#define CYREG_PERI_MS_PPU_FX409_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX410)
  */
#define CYREG_PERI_MS_PPU_FX410_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026E80UL)
#define CYREG_PERI_MS_PPU_FX410_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026E84UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026E90UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026E94UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026E98UL)
#define CYREG_PERI_MS_PPU_FX410_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026E9CUL)
#define CYREG_PERI_MS_PPU_FX410_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026EA0UL)
#define CYREG_PERI_MS_PPU_FX410_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026EA4UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026EB0UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026EB4UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026EB8UL)
#define CYREG_PERI_MS_PPU_FX410_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX411)
  */
#define CYREG_PERI_MS_PPU_FX411_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026EC0UL)
#define CYREG_PERI_MS_PPU_FX411_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026EC4UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026ED0UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026ED4UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026ED8UL)
#define CYREG_PERI_MS_PPU_FX411_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026EDCUL)
#define CYREG_PERI_MS_PPU_FX411_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026EE0UL)
#define CYREG_PERI_MS_PPU_FX411_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026EE4UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026EF0UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026EF4UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026EF8UL)
#define CYREG_PERI_MS_PPU_FX411_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX412)
  */
#define CYREG_PERI_MS_PPU_FX412_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026F00UL)
#define CYREG_PERI_MS_PPU_FX412_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026F04UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026F10UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026F14UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026F18UL)
#define CYREG_PERI_MS_PPU_FX412_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026F1CUL)
#define CYREG_PERI_MS_PPU_FX412_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026F20UL)
#define CYREG_PERI_MS_PPU_FX412_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026F24UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026F30UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026F34UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026F38UL)
#define CYREG_PERI_MS_PPU_FX412_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX413)
  */
#define CYREG_PERI_MS_PPU_FX413_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026F40UL)
#define CYREG_PERI_MS_PPU_FX413_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026F44UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026F50UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026F54UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026F58UL)
#define CYREG_PERI_MS_PPU_FX413_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026F5CUL)
#define CYREG_PERI_MS_PPU_FX413_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026F60UL)
#define CYREG_PERI_MS_PPU_FX413_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026F64UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026F70UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026F74UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026F78UL)
#define CYREG_PERI_MS_PPU_FX413_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX414)
  */
#define CYREG_PERI_MS_PPU_FX414_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026F80UL)
#define CYREG_PERI_MS_PPU_FX414_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026F84UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026F90UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026F94UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026F98UL)
#define CYREG_PERI_MS_PPU_FX414_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026F9CUL)
#define CYREG_PERI_MS_PPU_FX414_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026FA0UL)
#define CYREG_PERI_MS_PPU_FX414_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026FA4UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026FB0UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026FB4UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026FB8UL)
#define CYREG_PERI_MS_PPU_FX414_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX415)
  */
#define CYREG_PERI_MS_PPU_FX415_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40026FC0UL)
#define CYREG_PERI_MS_PPU_FX415_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40026FC4UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40026FD0UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40026FD4UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40026FD8UL)
#define CYREG_PERI_MS_PPU_FX415_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40026FDCUL)
#define CYREG_PERI_MS_PPU_FX415_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40026FE0UL)
#define CYREG_PERI_MS_PPU_FX415_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40026FE4UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40026FF0UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40026FF4UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40026FF8UL)
#define CYREG_PERI_MS_PPU_FX415_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40026FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX416)
  */
#define CYREG_PERI_MS_PPU_FX416_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027000UL)
#define CYREG_PERI_MS_PPU_FX416_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027004UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027010UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027014UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027018UL)
#define CYREG_PERI_MS_PPU_FX416_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002701CUL)
#define CYREG_PERI_MS_PPU_FX416_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027020UL)
#define CYREG_PERI_MS_PPU_FX416_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027024UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027030UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027034UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027038UL)
#define CYREG_PERI_MS_PPU_FX416_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002703CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX417)
  */
#define CYREG_PERI_MS_PPU_FX417_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027040UL)
#define CYREG_PERI_MS_PPU_FX417_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027044UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027050UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027054UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027058UL)
#define CYREG_PERI_MS_PPU_FX417_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002705CUL)
#define CYREG_PERI_MS_PPU_FX417_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027060UL)
#define CYREG_PERI_MS_PPU_FX417_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027064UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027070UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027074UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027078UL)
#define CYREG_PERI_MS_PPU_FX417_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002707CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX418)
  */
#define CYREG_PERI_MS_PPU_FX418_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027080UL)
#define CYREG_PERI_MS_PPU_FX418_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027084UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027090UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027094UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027098UL)
#define CYREG_PERI_MS_PPU_FX418_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002709CUL)
#define CYREG_PERI_MS_PPU_FX418_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400270A0UL)
#define CYREG_PERI_MS_PPU_FX418_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400270A4UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400270B0UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400270B4UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400270B8UL)
#define CYREG_PERI_MS_PPU_FX418_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400270BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX419)
  */
#define CYREG_PERI_MS_PPU_FX419_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400270C0UL)
#define CYREG_PERI_MS_PPU_FX419_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400270C4UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400270D0UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400270D4UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400270D8UL)
#define CYREG_PERI_MS_PPU_FX419_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400270DCUL)
#define CYREG_PERI_MS_PPU_FX419_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400270E0UL)
#define CYREG_PERI_MS_PPU_FX419_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400270E4UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400270F0UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400270F4UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400270F8UL)
#define CYREG_PERI_MS_PPU_FX419_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400270FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX420)
  */
#define CYREG_PERI_MS_PPU_FX420_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027100UL)
#define CYREG_PERI_MS_PPU_FX420_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027104UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027110UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027114UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027118UL)
#define CYREG_PERI_MS_PPU_FX420_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002711CUL)
#define CYREG_PERI_MS_PPU_FX420_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027120UL)
#define CYREG_PERI_MS_PPU_FX420_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027124UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027130UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027134UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027138UL)
#define CYREG_PERI_MS_PPU_FX420_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002713CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX421)
  */
#define CYREG_PERI_MS_PPU_FX421_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027140UL)
#define CYREG_PERI_MS_PPU_FX421_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027144UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027150UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027154UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027158UL)
#define CYREG_PERI_MS_PPU_FX421_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002715CUL)
#define CYREG_PERI_MS_PPU_FX421_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027160UL)
#define CYREG_PERI_MS_PPU_FX421_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027164UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027170UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027174UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027178UL)
#define CYREG_PERI_MS_PPU_FX421_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002717CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX422)
  */
#define CYREG_PERI_MS_PPU_FX422_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027180UL)
#define CYREG_PERI_MS_PPU_FX422_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027184UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027190UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027194UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027198UL)
#define CYREG_PERI_MS_PPU_FX422_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002719CUL)
#define CYREG_PERI_MS_PPU_FX422_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400271A0UL)
#define CYREG_PERI_MS_PPU_FX422_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400271A4UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400271B0UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400271B4UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400271B8UL)
#define CYREG_PERI_MS_PPU_FX422_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400271BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX423)
  */
#define CYREG_PERI_MS_PPU_FX423_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400271C0UL)
#define CYREG_PERI_MS_PPU_FX423_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400271C4UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400271D0UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400271D4UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400271D8UL)
#define CYREG_PERI_MS_PPU_FX423_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400271DCUL)
#define CYREG_PERI_MS_PPU_FX423_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400271E0UL)
#define CYREG_PERI_MS_PPU_FX423_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400271E4UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400271F0UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400271F4UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400271F8UL)
#define CYREG_PERI_MS_PPU_FX423_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400271FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX424)
  */
#define CYREG_PERI_MS_PPU_FX424_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027200UL)
#define CYREG_PERI_MS_PPU_FX424_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027204UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027210UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027214UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027218UL)
#define CYREG_PERI_MS_PPU_FX424_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002721CUL)
#define CYREG_PERI_MS_PPU_FX424_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027220UL)
#define CYREG_PERI_MS_PPU_FX424_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027224UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027230UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027234UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027238UL)
#define CYREG_PERI_MS_PPU_FX424_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002723CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX425)
  */
#define CYREG_PERI_MS_PPU_FX425_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027240UL)
#define CYREG_PERI_MS_PPU_FX425_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027244UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027250UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027254UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027258UL)
#define CYREG_PERI_MS_PPU_FX425_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002725CUL)
#define CYREG_PERI_MS_PPU_FX425_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027260UL)
#define CYREG_PERI_MS_PPU_FX425_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027264UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027270UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027274UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027278UL)
#define CYREG_PERI_MS_PPU_FX425_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002727CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX426)
  */
#define CYREG_PERI_MS_PPU_FX426_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027280UL)
#define CYREG_PERI_MS_PPU_FX426_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027284UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027290UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027294UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027298UL)
#define CYREG_PERI_MS_PPU_FX426_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002729CUL)
#define CYREG_PERI_MS_PPU_FX426_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400272A0UL)
#define CYREG_PERI_MS_PPU_FX426_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400272A4UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400272B0UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400272B4UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400272B8UL)
#define CYREG_PERI_MS_PPU_FX426_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400272BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX427)
  */
#define CYREG_PERI_MS_PPU_FX427_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400272C0UL)
#define CYREG_PERI_MS_PPU_FX427_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400272C4UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400272D0UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400272D4UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400272D8UL)
#define CYREG_PERI_MS_PPU_FX427_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400272DCUL)
#define CYREG_PERI_MS_PPU_FX427_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400272E0UL)
#define CYREG_PERI_MS_PPU_FX427_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400272E4UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400272F0UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400272F4UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400272F8UL)
#define CYREG_PERI_MS_PPU_FX427_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400272FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX428)
  */
#define CYREG_PERI_MS_PPU_FX428_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027300UL)
#define CYREG_PERI_MS_PPU_FX428_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027304UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027310UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027314UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027318UL)
#define CYREG_PERI_MS_PPU_FX428_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002731CUL)
#define CYREG_PERI_MS_PPU_FX428_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027320UL)
#define CYREG_PERI_MS_PPU_FX428_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027324UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027330UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027334UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027338UL)
#define CYREG_PERI_MS_PPU_FX428_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002733CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX429)
  */
#define CYREG_PERI_MS_PPU_FX429_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027340UL)
#define CYREG_PERI_MS_PPU_FX429_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027344UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027350UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027354UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027358UL)
#define CYREG_PERI_MS_PPU_FX429_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002735CUL)
#define CYREG_PERI_MS_PPU_FX429_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027360UL)
#define CYREG_PERI_MS_PPU_FX429_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027364UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027370UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027374UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027378UL)
#define CYREG_PERI_MS_PPU_FX429_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002737CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX430)
  */
#define CYREG_PERI_MS_PPU_FX430_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027380UL)
#define CYREG_PERI_MS_PPU_FX430_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027384UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027390UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027394UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027398UL)
#define CYREG_PERI_MS_PPU_FX430_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002739CUL)
#define CYREG_PERI_MS_PPU_FX430_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400273A0UL)
#define CYREG_PERI_MS_PPU_FX430_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400273A4UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400273B0UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400273B4UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400273B8UL)
#define CYREG_PERI_MS_PPU_FX430_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400273BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX431)
  */
#define CYREG_PERI_MS_PPU_FX431_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400273C0UL)
#define CYREG_PERI_MS_PPU_FX431_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400273C4UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400273D0UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400273D4UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400273D8UL)
#define CYREG_PERI_MS_PPU_FX431_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400273DCUL)
#define CYREG_PERI_MS_PPU_FX431_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400273E0UL)
#define CYREG_PERI_MS_PPU_FX431_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400273E4UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400273F0UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400273F4UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400273F8UL)
#define CYREG_PERI_MS_PPU_FX431_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400273FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX432)
  */
#define CYREG_PERI_MS_PPU_FX432_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027400UL)
#define CYREG_PERI_MS_PPU_FX432_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027404UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027410UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027414UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027418UL)
#define CYREG_PERI_MS_PPU_FX432_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002741CUL)
#define CYREG_PERI_MS_PPU_FX432_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027420UL)
#define CYREG_PERI_MS_PPU_FX432_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027424UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027430UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027434UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027438UL)
#define CYREG_PERI_MS_PPU_FX432_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002743CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX433)
  */
#define CYREG_PERI_MS_PPU_FX433_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027440UL)
#define CYREG_PERI_MS_PPU_FX433_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027444UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027450UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027454UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027458UL)
#define CYREG_PERI_MS_PPU_FX433_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002745CUL)
#define CYREG_PERI_MS_PPU_FX433_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027460UL)
#define CYREG_PERI_MS_PPU_FX433_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027464UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027470UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027474UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027478UL)
#define CYREG_PERI_MS_PPU_FX433_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002747CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX434)
  */
#define CYREG_PERI_MS_PPU_FX434_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027480UL)
#define CYREG_PERI_MS_PPU_FX434_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027484UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027490UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027494UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027498UL)
#define CYREG_PERI_MS_PPU_FX434_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002749CUL)
#define CYREG_PERI_MS_PPU_FX434_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400274A0UL)
#define CYREG_PERI_MS_PPU_FX434_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400274A4UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400274B0UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400274B4UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400274B8UL)
#define CYREG_PERI_MS_PPU_FX434_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400274BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX435)
  */
#define CYREG_PERI_MS_PPU_FX435_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400274C0UL)
#define CYREG_PERI_MS_PPU_FX435_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400274C4UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400274D0UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400274D4UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400274D8UL)
#define CYREG_PERI_MS_PPU_FX435_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400274DCUL)
#define CYREG_PERI_MS_PPU_FX435_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400274E0UL)
#define CYREG_PERI_MS_PPU_FX435_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400274E4UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400274F0UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400274F4UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400274F8UL)
#define CYREG_PERI_MS_PPU_FX435_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400274FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX436)
  */
#define CYREG_PERI_MS_PPU_FX436_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027500UL)
#define CYREG_PERI_MS_PPU_FX436_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027504UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027510UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027514UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027518UL)
#define CYREG_PERI_MS_PPU_FX436_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002751CUL)
#define CYREG_PERI_MS_PPU_FX436_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027520UL)
#define CYREG_PERI_MS_PPU_FX436_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027524UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027530UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027534UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027538UL)
#define CYREG_PERI_MS_PPU_FX436_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002753CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX437)
  */
#define CYREG_PERI_MS_PPU_FX437_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027540UL)
#define CYREG_PERI_MS_PPU_FX437_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027544UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027550UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027554UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027558UL)
#define CYREG_PERI_MS_PPU_FX437_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002755CUL)
#define CYREG_PERI_MS_PPU_FX437_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027560UL)
#define CYREG_PERI_MS_PPU_FX437_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027564UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027570UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027574UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027578UL)
#define CYREG_PERI_MS_PPU_FX437_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002757CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX438)
  */
#define CYREG_PERI_MS_PPU_FX438_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027580UL)
#define CYREG_PERI_MS_PPU_FX438_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027584UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027590UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027594UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027598UL)
#define CYREG_PERI_MS_PPU_FX438_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002759CUL)
#define CYREG_PERI_MS_PPU_FX438_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400275A0UL)
#define CYREG_PERI_MS_PPU_FX438_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400275A4UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400275B0UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400275B4UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400275B8UL)
#define CYREG_PERI_MS_PPU_FX438_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400275BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX439)
  */
#define CYREG_PERI_MS_PPU_FX439_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400275C0UL)
#define CYREG_PERI_MS_PPU_FX439_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400275C4UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400275D0UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400275D4UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400275D8UL)
#define CYREG_PERI_MS_PPU_FX439_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400275DCUL)
#define CYREG_PERI_MS_PPU_FX439_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400275E0UL)
#define CYREG_PERI_MS_PPU_FX439_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400275E4UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400275F0UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400275F4UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400275F8UL)
#define CYREG_PERI_MS_PPU_FX439_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400275FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX440)
  */
#define CYREG_PERI_MS_PPU_FX440_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027600UL)
#define CYREG_PERI_MS_PPU_FX440_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027604UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027610UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027614UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027618UL)
#define CYREG_PERI_MS_PPU_FX440_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002761CUL)
#define CYREG_PERI_MS_PPU_FX440_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027620UL)
#define CYREG_PERI_MS_PPU_FX440_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027624UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027630UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027634UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027638UL)
#define CYREG_PERI_MS_PPU_FX440_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002763CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX441)
  */
#define CYREG_PERI_MS_PPU_FX441_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027640UL)
#define CYREG_PERI_MS_PPU_FX441_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027644UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027650UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027654UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027658UL)
#define CYREG_PERI_MS_PPU_FX441_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002765CUL)
#define CYREG_PERI_MS_PPU_FX441_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027660UL)
#define CYREG_PERI_MS_PPU_FX441_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027664UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027670UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027674UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027678UL)
#define CYREG_PERI_MS_PPU_FX441_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002767CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX442)
  */
#define CYREG_PERI_MS_PPU_FX442_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027680UL)
#define CYREG_PERI_MS_PPU_FX442_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027684UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027690UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027694UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027698UL)
#define CYREG_PERI_MS_PPU_FX442_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002769CUL)
#define CYREG_PERI_MS_PPU_FX442_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400276A0UL)
#define CYREG_PERI_MS_PPU_FX442_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400276A4UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400276B0UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400276B4UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400276B8UL)
#define CYREG_PERI_MS_PPU_FX442_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400276BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX443)
  */
#define CYREG_PERI_MS_PPU_FX443_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400276C0UL)
#define CYREG_PERI_MS_PPU_FX443_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400276C4UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400276D0UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400276D4UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400276D8UL)
#define CYREG_PERI_MS_PPU_FX443_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400276DCUL)
#define CYREG_PERI_MS_PPU_FX443_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400276E0UL)
#define CYREG_PERI_MS_PPU_FX443_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400276E4UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400276F0UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400276F4UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400276F8UL)
#define CYREG_PERI_MS_PPU_FX443_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400276FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX444)
  */
#define CYREG_PERI_MS_PPU_FX444_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027700UL)
#define CYREG_PERI_MS_PPU_FX444_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027704UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027710UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027714UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027718UL)
#define CYREG_PERI_MS_PPU_FX444_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002771CUL)
#define CYREG_PERI_MS_PPU_FX444_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027720UL)
#define CYREG_PERI_MS_PPU_FX444_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027724UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027730UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027734UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027738UL)
#define CYREG_PERI_MS_PPU_FX444_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002773CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX445)
  */
#define CYREG_PERI_MS_PPU_FX445_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027740UL)
#define CYREG_PERI_MS_PPU_FX445_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027744UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027750UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027754UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027758UL)
#define CYREG_PERI_MS_PPU_FX445_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002775CUL)
#define CYREG_PERI_MS_PPU_FX445_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027760UL)
#define CYREG_PERI_MS_PPU_FX445_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027764UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027770UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027774UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027778UL)
#define CYREG_PERI_MS_PPU_FX445_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002777CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX446)
  */
#define CYREG_PERI_MS_PPU_FX446_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027780UL)
#define CYREG_PERI_MS_PPU_FX446_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027784UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027790UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027794UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027798UL)
#define CYREG_PERI_MS_PPU_FX446_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002779CUL)
#define CYREG_PERI_MS_PPU_FX446_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400277A0UL)
#define CYREG_PERI_MS_PPU_FX446_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400277A4UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400277B0UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400277B4UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400277B8UL)
#define CYREG_PERI_MS_PPU_FX446_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400277BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX447)
  */
#define CYREG_PERI_MS_PPU_FX447_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400277C0UL)
#define CYREG_PERI_MS_PPU_FX447_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400277C4UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400277D0UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400277D4UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400277D8UL)
#define CYREG_PERI_MS_PPU_FX447_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400277DCUL)
#define CYREG_PERI_MS_PPU_FX447_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400277E0UL)
#define CYREG_PERI_MS_PPU_FX447_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400277E4UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400277F0UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400277F4UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400277F8UL)
#define CYREG_PERI_MS_PPU_FX447_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400277FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX448)
  */
#define CYREG_PERI_MS_PPU_FX448_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027800UL)
#define CYREG_PERI_MS_PPU_FX448_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027804UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027810UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027814UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027818UL)
#define CYREG_PERI_MS_PPU_FX448_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002781CUL)
#define CYREG_PERI_MS_PPU_FX448_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027820UL)
#define CYREG_PERI_MS_PPU_FX448_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027824UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027830UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027834UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027838UL)
#define CYREG_PERI_MS_PPU_FX448_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002783CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX449)
  */
#define CYREG_PERI_MS_PPU_FX449_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027840UL)
#define CYREG_PERI_MS_PPU_FX449_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027844UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027850UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027854UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027858UL)
#define CYREG_PERI_MS_PPU_FX449_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002785CUL)
#define CYREG_PERI_MS_PPU_FX449_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027860UL)
#define CYREG_PERI_MS_PPU_FX449_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027864UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027870UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027874UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027878UL)
#define CYREG_PERI_MS_PPU_FX449_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002787CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX450)
  */
#define CYREG_PERI_MS_PPU_FX450_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027880UL)
#define CYREG_PERI_MS_PPU_FX450_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027884UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027890UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027894UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027898UL)
#define CYREG_PERI_MS_PPU_FX450_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002789CUL)
#define CYREG_PERI_MS_PPU_FX450_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400278A0UL)
#define CYREG_PERI_MS_PPU_FX450_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400278A4UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400278B0UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400278B4UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400278B8UL)
#define CYREG_PERI_MS_PPU_FX450_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400278BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX451)
  */
#define CYREG_PERI_MS_PPU_FX451_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400278C0UL)
#define CYREG_PERI_MS_PPU_FX451_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400278C4UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400278D0UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400278D4UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400278D8UL)
#define CYREG_PERI_MS_PPU_FX451_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400278DCUL)
#define CYREG_PERI_MS_PPU_FX451_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400278E0UL)
#define CYREG_PERI_MS_PPU_FX451_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400278E4UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400278F0UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400278F4UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400278F8UL)
#define CYREG_PERI_MS_PPU_FX451_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400278FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX452)
  */
#define CYREG_PERI_MS_PPU_FX452_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027900UL)
#define CYREG_PERI_MS_PPU_FX452_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027904UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027910UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027914UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027918UL)
#define CYREG_PERI_MS_PPU_FX452_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002791CUL)
#define CYREG_PERI_MS_PPU_FX452_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027920UL)
#define CYREG_PERI_MS_PPU_FX452_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027924UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027930UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027934UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027938UL)
#define CYREG_PERI_MS_PPU_FX452_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002793CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX453)
  */
#define CYREG_PERI_MS_PPU_FX453_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027940UL)
#define CYREG_PERI_MS_PPU_FX453_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027944UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027950UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027954UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027958UL)
#define CYREG_PERI_MS_PPU_FX453_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002795CUL)
#define CYREG_PERI_MS_PPU_FX453_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027960UL)
#define CYREG_PERI_MS_PPU_FX453_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027964UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027970UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027974UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027978UL)
#define CYREG_PERI_MS_PPU_FX453_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002797CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX454)
  */
#define CYREG_PERI_MS_PPU_FX454_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027980UL)
#define CYREG_PERI_MS_PPU_FX454_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027984UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027990UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027994UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027998UL)
#define CYREG_PERI_MS_PPU_FX454_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002799CUL)
#define CYREG_PERI_MS_PPU_FX454_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400279A0UL)
#define CYREG_PERI_MS_PPU_FX454_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400279A4UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400279B0UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400279B4UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400279B8UL)
#define CYREG_PERI_MS_PPU_FX454_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400279BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX455)
  */
#define CYREG_PERI_MS_PPU_FX455_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400279C0UL)
#define CYREG_PERI_MS_PPU_FX455_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400279C4UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400279D0UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400279D4UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400279D8UL)
#define CYREG_PERI_MS_PPU_FX455_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400279DCUL)
#define CYREG_PERI_MS_PPU_FX455_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400279E0UL)
#define CYREG_PERI_MS_PPU_FX455_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400279E4UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400279F0UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400279F4UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400279F8UL)
#define CYREG_PERI_MS_PPU_FX455_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400279FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX456)
  */
#define CYREG_PERI_MS_PPU_FX456_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027A00UL)
#define CYREG_PERI_MS_PPU_FX456_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027A04UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027A10UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027A14UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027A18UL)
#define CYREG_PERI_MS_PPU_FX456_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027A1CUL)
#define CYREG_PERI_MS_PPU_FX456_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027A20UL)
#define CYREG_PERI_MS_PPU_FX456_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027A24UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027A30UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027A34UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027A38UL)
#define CYREG_PERI_MS_PPU_FX456_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX457)
  */
#define CYREG_PERI_MS_PPU_FX457_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027A40UL)
#define CYREG_PERI_MS_PPU_FX457_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027A44UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027A50UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027A54UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027A58UL)
#define CYREG_PERI_MS_PPU_FX457_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027A5CUL)
#define CYREG_PERI_MS_PPU_FX457_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027A60UL)
#define CYREG_PERI_MS_PPU_FX457_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027A64UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027A70UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027A74UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027A78UL)
#define CYREG_PERI_MS_PPU_FX457_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX458)
  */
#define CYREG_PERI_MS_PPU_FX458_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027A80UL)
#define CYREG_PERI_MS_PPU_FX458_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027A84UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027A90UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027A94UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027A98UL)
#define CYREG_PERI_MS_PPU_FX458_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027A9CUL)
#define CYREG_PERI_MS_PPU_FX458_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027AA0UL)
#define CYREG_PERI_MS_PPU_FX458_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027AA4UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027AB0UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027AB4UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027AB8UL)
#define CYREG_PERI_MS_PPU_FX458_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX459)
  */
#define CYREG_PERI_MS_PPU_FX459_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027AC0UL)
#define CYREG_PERI_MS_PPU_FX459_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027AC4UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027AD0UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027AD4UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027AD8UL)
#define CYREG_PERI_MS_PPU_FX459_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027ADCUL)
#define CYREG_PERI_MS_PPU_FX459_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027AE0UL)
#define CYREG_PERI_MS_PPU_FX459_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027AE4UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027AF0UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027AF4UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027AF8UL)
#define CYREG_PERI_MS_PPU_FX459_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX460)
  */
#define CYREG_PERI_MS_PPU_FX460_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027B00UL)
#define CYREG_PERI_MS_PPU_FX460_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027B04UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027B10UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027B14UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027B18UL)
#define CYREG_PERI_MS_PPU_FX460_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027B1CUL)
#define CYREG_PERI_MS_PPU_FX460_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027B20UL)
#define CYREG_PERI_MS_PPU_FX460_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027B24UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027B30UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027B34UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027B38UL)
#define CYREG_PERI_MS_PPU_FX460_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX461)
  */
#define CYREG_PERI_MS_PPU_FX461_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027B40UL)
#define CYREG_PERI_MS_PPU_FX461_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027B44UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027B50UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027B54UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027B58UL)
#define CYREG_PERI_MS_PPU_FX461_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027B5CUL)
#define CYREG_PERI_MS_PPU_FX461_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027B60UL)
#define CYREG_PERI_MS_PPU_FX461_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027B64UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027B70UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027B74UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027B78UL)
#define CYREG_PERI_MS_PPU_FX461_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX462)
  */
#define CYREG_PERI_MS_PPU_FX462_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027B80UL)
#define CYREG_PERI_MS_PPU_FX462_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027B84UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027B90UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027B94UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027B98UL)
#define CYREG_PERI_MS_PPU_FX462_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027B9CUL)
#define CYREG_PERI_MS_PPU_FX462_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027BA0UL)
#define CYREG_PERI_MS_PPU_FX462_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027BA4UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027BB0UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027BB4UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027BB8UL)
#define CYREG_PERI_MS_PPU_FX462_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX463)
  */
#define CYREG_PERI_MS_PPU_FX463_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027BC0UL)
#define CYREG_PERI_MS_PPU_FX463_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027BC4UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027BD0UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027BD4UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027BD8UL)
#define CYREG_PERI_MS_PPU_FX463_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027BDCUL)
#define CYREG_PERI_MS_PPU_FX463_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027BE0UL)
#define CYREG_PERI_MS_PPU_FX463_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027BE4UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027BF0UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027BF4UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027BF8UL)
#define CYREG_PERI_MS_PPU_FX463_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX464)
  */
#define CYREG_PERI_MS_PPU_FX464_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027C00UL)
#define CYREG_PERI_MS_PPU_FX464_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027C04UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027C10UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027C14UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027C18UL)
#define CYREG_PERI_MS_PPU_FX464_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027C1CUL)
#define CYREG_PERI_MS_PPU_FX464_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027C20UL)
#define CYREG_PERI_MS_PPU_FX464_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027C24UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027C30UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027C34UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027C38UL)
#define CYREG_PERI_MS_PPU_FX464_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX465)
  */
#define CYREG_PERI_MS_PPU_FX465_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027C40UL)
#define CYREG_PERI_MS_PPU_FX465_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027C44UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027C50UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027C54UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027C58UL)
#define CYREG_PERI_MS_PPU_FX465_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027C5CUL)
#define CYREG_PERI_MS_PPU_FX465_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027C60UL)
#define CYREG_PERI_MS_PPU_FX465_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027C64UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027C70UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027C74UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027C78UL)
#define CYREG_PERI_MS_PPU_FX465_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX466)
  */
#define CYREG_PERI_MS_PPU_FX466_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027C80UL)
#define CYREG_PERI_MS_PPU_FX466_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027C84UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027C90UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027C94UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027C98UL)
#define CYREG_PERI_MS_PPU_FX466_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027C9CUL)
#define CYREG_PERI_MS_PPU_FX466_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027CA0UL)
#define CYREG_PERI_MS_PPU_FX466_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027CA4UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027CB0UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027CB4UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027CB8UL)
#define CYREG_PERI_MS_PPU_FX466_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX467)
  */
#define CYREG_PERI_MS_PPU_FX467_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027CC0UL)
#define CYREG_PERI_MS_PPU_FX467_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027CC4UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027CD0UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027CD4UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027CD8UL)
#define CYREG_PERI_MS_PPU_FX467_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027CDCUL)
#define CYREG_PERI_MS_PPU_FX467_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027CE0UL)
#define CYREG_PERI_MS_PPU_FX467_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027CE4UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027CF0UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027CF4UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027CF8UL)
#define CYREG_PERI_MS_PPU_FX467_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX468)
  */
#define CYREG_PERI_MS_PPU_FX468_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027D00UL)
#define CYREG_PERI_MS_PPU_FX468_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027D04UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027D10UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027D14UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027D18UL)
#define CYREG_PERI_MS_PPU_FX468_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027D1CUL)
#define CYREG_PERI_MS_PPU_FX468_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027D20UL)
#define CYREG_PERI_MS_PPU_FX468_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027D24UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027D30UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027D34UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027D38UL)
#define CYREG_PERI_MS_PPU_FX468_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX469)
  */
#define CYREG_PERI_MS_PPU_FX469_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027D40UL)
#define CYREG_PERI_MS_PPU_FX469_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027D44UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027D50UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027D54UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027D58UL)
#define CYREG_PERI_MS_PPU_FX469_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027D5CUL)
#define CYREG_PERI_MS_PPU_FX469_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027D60UL)
#define CYREG_PERI_MS_PPU_FX469_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027D64UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027D70UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027D74UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027D78UL)
#define CYREG_PERI_MS_PPU_FX469_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX470)
  */
#define CYREG_PERI_MS_PPU_FX470_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027D80UL)
#define CYREG_PERI_MS_PPU_FX470_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027D84UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027D90UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027D94UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027D98UL)
#define CYREG_PERI_MS_PPU_FX470_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027D9CUL)
#define CYREG_PERI_MS_PPU_FX470_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027DA0UL)
#define CYREG_PERI_MS_PPU_FX470_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027DA4UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027DB0UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027DB4UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027DB8UL)
#define CYREG_PERI_MS_PPU_FX470_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX471)
  */
#define CYREG_PERI_MS_PPU_FX471_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027DC0UL)
#define CYREG_PERI_MS_PPU_FX471_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027DC4UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027DD0UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027DD4UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027DD8UL)
#define CYREG_PERI_MS_PPU_FX471_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027DDCUL)
#define CYREG_PERI_MS_PPU_FX471_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027DE0UL)
#define CYREG_PERI_MS_PPU_FX471_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027DE4UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027DF0UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027DF4UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027DF8UL)
#define CYREG_PERI_MS_PPU_FX471_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX472)
  */
#define CYREG_PERI_MS_PPU_FX472_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027E00UL)
#define CYREG_PERI_MS_PPU_FX472_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027E04UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027E10UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027E14UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027E18UL)
#define CYREG_PERI_MS_PPU_FX472_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027E1CUL)
#define CYREG_PERI_MS_PPU_FX472_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027E20UL)
#define CYREG_PERI_MS_PPU_FX472_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027E24UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027E30UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027E34UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027E38UL)
#define CYREG_PERI_MS_PPU_FX472_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX473)
  */
#define CYREG_PERI_MS_PPU_FX473_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027E40UL)
#define CYREG_PERI_MS_PPU_FX473_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027E44UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027E50UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027E54UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027E58UL)
#define CYREG_PERI_MS_PPU_FX473_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027E5CUL)
#define CYREG_PERI_MS_PPU_FX473_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027E60UL)
#define CYREG_PERI_MS_PPU_FX473_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027E64UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027E70UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027E74UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027E78UL)
#define CYREG_PERI_MS_PPU_FX473_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX474)
  */
#define CYREG_PERI_MS_PPU_FX474_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027E80UL)
#define CYREG_PERI_MS_PPU_FX474_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027E84UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027E90UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027E94UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027E98UL)
#define CYREG_PERI_MS_PPU_FX474_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027E9CUL)
#define CYREG_PERI_MS_PPU_FX474_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027EA0UL)
#define CYREG_PERI_MS_PPU_FX474_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027EA4UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027EB0UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027EB4UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027EB8UL)
#define CYREG_PERI_MS_PPU_FX474_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX475)
  */
#define CYREG_PERI_MS_PPU_FX475_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027EC0UL)
#define CYREG_PERI_MS_PPU_FX475_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027EC4UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027ED0UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027ED4UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027ED8UL)
#define CYREG_PERI_MS_PPU_FX475_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027EDCUL)
#define CYREG_PERI_MS_PPU_FX475_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027EE0UL)
#define CYREG_PERI_MS_PPU_FX475_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027EE4UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027EF0UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027EF4UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027EF8UL)
#define CYREG_PERI_MS_PPU_FX475_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX476)
  */
#define CYREG_PERI_MS_PPU_FX476_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027F00UL)
#define CYREG_PERI_MS_PPU_FX476_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027F04UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027F10UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027F14UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027F18UL)
#define CYREG_PERI_MS_PPU_FX476_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027F1CUL)
#define CYREG_PERI_MS_PPU_FX476_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027F20UL)
#define CYREG_PERI_MS_PPU_FX476_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027F24UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027F30UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027F34UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027F38UL)
#define CYREG_PERI_MS_PPU_FX476_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX477)
  */
#define CYREG_PERI_MS_PPU_FX477_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027F40UL)
#define CYREG_PERI_MS_PPU_FX477_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027F44UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027F50UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027F54UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027F58UL)
#define CYREG_PERI_MS_PPU_FX477_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027F5CUL)
#define CYREG_PERI_MS_PPU_FX477_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027F60UL)
#define CYREG_PERI_MS_PPU_FX477_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027F64UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027F70UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027F74UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027F78UL)
#define CYREG_PERI_MS_PPU_FX477_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX478)
  */
#define CYREG_PERI_MS_PPU_FX478_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027F80UL)
#define CYREG_PERI_MS_PPU_FX478_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027F84UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027F90UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027F94UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027F98UL)
#define CYREG_PERI_MS_PPU_FX478_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027F9CUL)
#define CYREG_PERI_MS_PPU_FX478_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027FA0UL)
#define CYREG_PERI_MS_PPU_FX478_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027FA4UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027FB0UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027FB4UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027FB8UL)
#define CYREG_PERI_MS_PPU_FX478_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX479)
  */
#define CYREG_PERI_MS_PPU_FX479_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40027FC0UL)
#define CYREG_PERI_MS_PPU_FX479_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40027FC4UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40027FD0UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40027FD4UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40027FD8UL)
#define CYREG_PERI_MS_PPU_FX479_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40027FDCUL)
#define CYREG_PERI_MS_PPU_FX479_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40027FE0UL)
#define CYREG_PERI_MS_PPU_FX479_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40027FE4UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40027FF0UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40027FF4UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40027FF8UL)
#define CYREG_PERI_MS_PPU_FX479_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40027FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX480)
  */
#define CYREG_PERI_MS_PPU_FX480_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028000UL)
#define CYREG_PERI_MS_PPU_FX480_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028004UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028010UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028014UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028018UL)
#define CYREG_PERI_MS_PPU_FX480_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002801CUL)
#define CYREG_PERI_MS_PPU_FX480_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028020UL)
#define CYREG_PERI_MS_PPU_FX480_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028024UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028030UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028034UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028038UL)
#define CYREG_PERI_MS_PPU_FX480_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002803CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX481)
  */
#define CYREG_PERI_MS_PPU_FX481_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028040UL)
#define CYREG_PERI_MS_PPU_FX481_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028044UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028050UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028054UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028058UL)
#define CYREG_PERI_MS_PPU_FX481_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002805CUL)
#define CYREG_PERI_MS_PPU_FX481_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028060UL)
#define CYREG_PERI_MS_PPU_FX481_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028064UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028070UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028074UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028078UL)
#define CYREG_PERI_MS_PPU_FX481_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002807CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX482)
  */
#define CYREG_PERI_MS_PPU_FX482_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028080UL)
#define CYREG_PERI_MS_PPU_FX482_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028084UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028090UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028094UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028098UL)
#define CYREG_PERI_MS_PPU_FX482_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002809CUL)
#define CYREG_PERI_MS_PPU_FX482_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400280A0UL)
#define CYREG_PERI_MS_PPU_FX482_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400280A4UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400280B0UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400280B4UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400280B8UL)
#define CYREG_PERI_MS_PPU_FX482_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400280BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX483)
  */
#define CYREG_PERI_MS_PPU_FX483_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400280C0UL)
#define CYREG_PERI_MS_PPU_FX483_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400280C4UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400280D0UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400280D4UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400280D8UL)
#define CYREG_PERI_MS_PPU_FX483_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400280DCUL)
#define CYREG_PERI_MS_PPU_FX483_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400280E0UL)
#define CYREG_PERI_MS_PPU_FX483_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400280E4UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400280F0UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400280F4UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400280F8UL)
#define CYREG_PERI_MS_PPU_FX483_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400280FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX484)
  */
#define CYREG_PERI_MS_PPU_FX484_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028100UL)
#define CYREG_PERI_MS_PPU_FX484_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028104UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028110UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028114UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028118UL)
#define CYREG_PERI_MS_PPU_FX484_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002811CUL)
#define CYREG_PERI_MS_PPU_FX484_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028120UL)
#define CYREG_PERI_MS_PPU_FX484_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028124UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028130UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028134UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028138UL)
#define CYREG_PERI_MS_PPU_FX484_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002813CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX485)
  */
#define CYREG_PERI_MS_PPU_FX485_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028140UL)
#define CYREG_PERI_MS_PPU_FX485_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028144UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028150UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028154UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028158UL)
#define CYREG_PERI_MS_PPU_FX485_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002815CUL)
#define CYREG_PERI_MS_PPU_FX485_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028160UL)
#define CYREG_PERI_MS_PPU_FX485_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028164UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028170UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028174UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028178UL)
#define CYREG_PERI_MS_PPU_FX485_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002817CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX486)
  */
#define CYREG_PERI_MS_PPU_FX486_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028180UL)
#define CYREG_PERI_MS_PPU_FX486_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028184UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028190UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028194UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028198UL)
#define CYREG_PERI_MS_PPU_FX486_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002819CUL)
#define CYREG_PERI_MS_PPU_FX486_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400281A0UL)
#define CYREG_PERI_MS_PPU_FX486_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400281A4UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400281B0UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400281B4UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400281B8UL)
#define CYREG_PERI_MS_PPU_FX486_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400281BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX487)
  */
#define CYREG_PERI_MS_PPU_FX487_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400281C0UL)
#define CYREG_PERI_MS_PPU_FX487_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400281C4UL)
#define CYREG_PERI_MS_PPU_FX487_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400281D0UL)
#define CYREG_PERI_MS_PPU_FX487_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400281D4UL)
#define CYREG_PERI_MS_PPU_FX487_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400281D8UL)
#define CYREG_PERI_MS_PPU_FX487_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400281DCUL)
#define CYREG_PERI_MS_PPU_FX487_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400281E0UL)
#define CYREG_PERI_MS_PPU_FX487_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400281E4UL)
#define CYREG_PERI_MS_PPU_FX487_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400281F0UL)
#define CYREG_PERI_MS_PPU_FX487_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400281F4UL)
#define CYREG_PERI_MS_PPU_FX487_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400281F8UL)
#define CYREG_PERI_MS_PPU_FX487_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400281FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX488)
  */
#define CYREG_PERI_MS_PPU_FX488_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028200UL)
#define CYREG_PERI_MS_PPU_FX488_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028204UL)
#define CYREG_PERI_MS_PPU_FX488_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028210UL)
#define CYREG_PERI_MS_PPU_FX488_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028214UL)
#define CYREG_PERI_MS_PPU_FX488_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028218UL)
#define CYREG_PERI_MS_PPU_FX488_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002821CUL)
#define CYREG_PERI_MS_PPU_FX488_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028220UL)
#define CYREG_PERI_MS_PPU_FX488_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028224UL)
#define CYREG_PERI_MS_PPU_FX488_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028230UL)
#define CYREG_PERI_MS_PPU_FX488_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028234UL)
#define CYREG_PERI_MS_PPU_FX488_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028238UL)
#define CYREG_PERI_MS_PPU_FX488_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002823CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX489)
  */
#define CYREG_PERI_MS_PPU_FX489_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028240UL)
#define CYREG_PERI_MS_PPU_FX489_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028244UL)
#define CYREG_PERI_MS_PPU_FX489_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028250UL)
#define CYREG_PERI_MS_PPU_FX489_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028254UL)
#define CYREG_PERI_MS_PPU_FX489_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028258UL)
#define CYREG_PERI_MS_PPU_FX489_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002825CUL)
#define CYREG_PERI_MS_PPU_FX489_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028260UL)
#define CYREG_PERI_MS_PPU_FX489_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028264UL)
#define CYREG_PERI_MS_PPU_FX489_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028270UL)
#define CYREG_PERI_MS_PPU_FX489_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028274UL)
#define CYREG_PERI_MS_PPU_FX489_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028278UL)
#define CYREG_PERI_MS_PPU_FX489_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002827CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX490)
  */
#define CYREG_PERI_MS_PPU_FX490_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028280UL)
#define CYREG_PERI_MS_PPU_FX490_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028284UL)
#define CYREG_PERI_MS_PPU_FX490_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028290UL)
#define CYREG_PERI_MS_PPU_FX490_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028294UL)
#define CYREG_PERI_MS_PPU_FX490_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028298UL)
#define CYREG_PERI_MS_PPU_FX490_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002829CUL)
#define CYREG_PERI_MS_PPU_FX490_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400282A0UL)
#define CYREG_PERI_MS_PPU_FX490_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400282A4UL)
#define CYREG_PERI_MS_PPU_FX490_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400282B0UL)
#define CYREG_PERI_MS_PPU_FX490_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400282B4UL)
#define CYREG_PERI_MS_PPU_FX490_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400282B8UL)
#define CYREG_PERI_MS_PPU_FX490_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400282BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX491)
  */
#define CYREG_PERI_MS_PPU_FX491_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400282C0UL)
#define CYREG_PERI_MS_PPU_FX491_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400282C4UL)
#define CYREG_PERI_MS_PPU_FX491_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400282D0UL)
#define CYREG_PERI_MS_PPU_FX491_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400282D4UL)
#define CYREG_PERI_MS_PPU_FX491_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400282D8UL)
#define CYREG_PERI_MS_PPU_FX491_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400282DCUL)
#define CYREG_PERI_MS_PPU_FX491_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400282E0UL)
#define CYREG_PERI_MS_PPU_FX491_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400282E4UL)
#define CYREG_PERI_MS_PPU_FX491_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400282F0UL)
#define CYREG_PERI_MS_PPU_FX491_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400282F4UL)
#define CYREG_PERI_MS_PPU_FX491_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400282F8UL)
#define CYREG_PERI_MS_PPU_FX491_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400282FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX492)
  */
#define CYREG_PERI_MS_PPU_FX492_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028300UL)
#define CYREG_PERI_MS_PPU_FX492_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028304UL)
#define CYREG_PERI_MS_PPU_FX492_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028310UL)
#define CYREG_PERI_MS_PPU_FX492_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028314UL)
#define CYREG_PERI_MS_PPU_FX492_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028318UL)
#define CYREG_PERI_MS_PPU_FX492_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002831CUL)
#define CYREG_PERI_MS_PPU_FX492_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028320UL)
#define CYREG_PERI_MS_PPU_FX492_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028324UL)
#define CYREG_PERI_MS_PPU_FX492_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028330UL)
#define CYREG_PERI_MS_PPU_FX492_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028334UL)
#define CYREG_PERI_MS_PPU_FX492_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028338UL)
#define CYREG_PERI_MS_PPU_FX492_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002833CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX493)
  */
#define CYREG_PERI_MS_PPU_FX493_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028340UL)
#define CYREG_PERI_MS_PPU_FX493_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028344UL)
#define CYREG_PERI_MS_PPU_FX493_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028350UL)
#define CYREG_PERI_MS_PPU_FX493_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028354UL)
#define CYREG_PERI_MS_PPU_FX493_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028358UL)
#define CYREG_PERI_MS_PPU_FX493_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002835CUL)
#define CYREG_PERI_MS_PPU_FX493_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028360UL)
#define CYREG_PERI_MS_PPU_FX493_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028364UL)
#define CYREG_PERI_MS_PPU_FX493_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028370UL)
#define CYREG_PERI_MS_PPU_FX493_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028374UL)
#define CYREG_PERI_MS_PPU_FX493_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028378UL)
#define CYREG_PERI_MS_PPU_FX493_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002837CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX494)
  */
#define CYREG_PERI_MS_PPU_FX494_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028380UL)
#define CYREG_PERI_MS_PPU_FX494_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028384UL)
#define CYREG_PERI_MS_PPU_FX494_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028390UL)
#define CYREG_PERI_MS_PPU_FX494_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028394UL)
#define CYREG_PERI_MS_PPU_FX494_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028398UL)
#define CYREG_PERI_MS_PPU_FX494_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002839CUL)
#define CYREG_PERI_MS_PPU_FX494_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400283A0UL)
#define CYREG_PERI_MS_PPU_FX494_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400283A4UL)
#define CYREG_PERI_MS_PPU_FX494_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400283B0UL)
#define CYREG_PERI_MS_PPU_FX494_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400283B4UL)
#define CYREG_PERI_MS_PPU_FX494_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400283B8UL)
#define CYREG_PERI_MS_PPU_FX494_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400283BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX495)
  */
#define CYREG_PERI_MS_PPU_FX495_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400283C0UL)
#define CYREG_PERI_MS_PPU_FX495_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400283C4UL)
#define CYREG_PERI_MS_PPU_FX495_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400283D0UL)
#define CYREG_PERI_MS_PPU_FX495_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400283D4UL)
#define CYREG_PERI_MS_PPU_FX495_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400283D8UL)
#define CYREG_PERI_MS_PPU_FX495_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400283DCUL)
#define CYREG_PERI_MS_PPU_FX495_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400283E0UL)
#define CYREG_PERI_MS_PPU_FX495_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400283E4UL)
#define CYREG_PERI_MS_PPU_FX495_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400283F0UL)
#define CYREG_PERI_MS_PPU_FX495_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400283F4UL)
#define CYREG_PERI_MS_PPU_FX495_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400283F8UL)
#define CYREG_PERI_MS_PPU_FX495_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400283FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX496)
  */
#define CYREG_PERI_MS_PPU_FX496_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028400UL)
#define CYREG_PERI_MS_PPU_FX496_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028404UL)
#define CYREG_PERI_MS_PPU_FX496_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028410UL)
#define CYREG_PERI_MS_PPU_FX496_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028414UL)
#define CYREG_PERI_MS_PPU_FX496_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028418UL)
#define CYREG_PERI_MS_PPU_FX496_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002841CUL)
#define CYREG_PERI_MS_PPU_FX496_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028420UL)
#define CYREG_PERI_MS_PPU_FX496_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028424UL)
#define CYREG_PERI_MS_PPU_FX496_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028430UL)
#define CYREG_PERI_MS_PPU_FX496_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028434UL)
#define CYREG_PERI_MS_PPU_FX496_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028438UL)
#define CYREG_PERI_MS_PPU_FX496_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002843CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX497)
  */
#define CYREG_PERI_MS_PPU_FX497_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028440UL)
#define CYREG_PERI_MS_PPU_FX497_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028444UL)
#define CYREG_PERI_MS_PPU_FX497_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028450UL)
#define CYREG_PERI_MS_PPU_FX497_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028454UL)
#define CYREG_PERI_MS_PPU_FX497_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028458UL)
#define CYREG_PERI_MS_PPU_FX497_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002845CUL)
#define CYREG_PERI_MS_PPU_FX497_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028460UL)
#define CYREG_PERI_MS_PPU_FX497_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028464UL)
#define CYREG_PERI_MS_PPU_FX497_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028470UL)
#define CYREG_PERI_MS_PPU_FX497_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028474UL)
#define CYREG_PERI_MS_PPU_FX497_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028478UL)
#define CYREG_PERI_MS_PPU_FX497_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002847CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX498)
  */
#define CYREG_PERI_MS_PPU_FX498_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028480UL)
#define CYREG_PERI_MS_PPU_FX498_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028484UL)
#define CYREG_PERI_MS_PPU_FX498_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028490UL)
#define CYREG_PERI_MS_PPU_FX498_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028494UL)
#define CYREG_PERI_MS_PPU_FX498_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028498UL)
#define CYREG_PERI_MS_PPU_FX498_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002849CUL)
#define CYREG_PERI_MS_PPU_FX498_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400284A0UL)
#define CYREG_PERI_MS_PPU_FX498_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400284A4UL)
#define CYREG_PERI_MS_PPU_FX498_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400284B0UL)
#define CYREG_PERI_MS_PPU_FX498_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400284B4UL)
#define CYREG_PERI_MS_PPU_FX498_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400284B8UL)
#define CYREG_PERI_MS_PPU_FX498_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400284BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX499)
  */
#define CYREG_PERI_MS_PPU_FX499_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400284C0UL)
#define CYREG_PERI_MS_PPU_FX499_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400284C4UL)
#define CYREG_PERI_MS_PPU_FX499_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400284D0UL)
#define CYREG_PERI_MS_PPU_FX499_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400284D4UL)
#define CYREG_PERI_MS_PPU_FX499_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400284D8UL)
#define CYREG_PERI_MS_PPU_FX499_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400284DCUL)
#define CYREG_PERI_MS_PPU_FX499_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400284E0UL)
#define CYREG_PERI_MS_PPU_FX499_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400284E4UL)
#define CYREG_PERI_MS_PPU_FX499_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400284F0UL)
#define CYREG_PERI_MS_PPU_FX499_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400284F4UL)
#define CYREG_PERI_MS_PPU_FX499_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400284F8UL)
#define CYREG_PERI_MS_PPU_FX499_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400284FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX500)
  */
#define CYREG_PERI_MS_PPU_FX500_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028500UL)
#define CYREG_PERI_MS_PPU_FX500_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028504UL)
#define CYREG_PERI_MS_PPU_FX500_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028510UL)
#define CYREG_PERI_MS_PPU_FX500_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028514UL)
#define CYREG_PERI_MS_PPU_FX500_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028518UL)
#define CYREG_PERI_MS_PPU_FX500_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002851CUL)
#define CYREG_PERI_MS_PPU_FX500_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028520UL)
#define CYREG_PERI_MS_PPU_FX500_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028524UL)
#define CYREG_PERI_MS_PPU_FX500_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028530UL)
#define CYREG_PERI_MS_PPU_FX500_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028534UL)
#define CYREG_PERI_MS_PPU_FX500_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028538UL)
#define CYREG_PERI_MS_PPU_FX500_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002853CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX501)
  */
#define CYREG_PERI_MS_PPU_FX501_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028540UL)
#define CYREG_PERI_MS_PPU_FX501_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028544UL)
#define CYREG_PERI_MS_PPU_FX501_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028550UL)
#define CYREG_PERI_MS_PPU_FX501_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028554UL)
#define CYREG_PERI_MS_PPU_FX501_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028558UL)
#define CYREG_PERI_MS_PPU_FX501_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002855CUL)
#define CYREG_PERI_MS_PPU_FX501_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028560UL)
#define CYREG_PERI_MS_PPU_FX501_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028564UL)
#define CYREG_PERI_MS_PPU_FX501_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028570UL)
#define CYREG_PERI_MS_PPU_FX501_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028574UL)
#define CYREG_PERI_MS_PPU_FX501_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028578UL)
#define CYREG_PERI_MS_PPU_FX501_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002857CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX502)
  */
#define CYREG_PERI_MS_PPU_FX502_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028580UL)
#define CYREG_PERI_MS_PPU_FX502_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028584UL)
#define CYREG_PERI_MS_PPU_FX502_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028590UL)
#define CYREG_PERI_MS_PPU_FX502_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028594UL)
#define CYREG_PERI_MS_PPU_FX502_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028598UL)
#define CYREG_PERI_MS_PPU_FX502_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002859CUL)
#define CYREG_PERI_MS_PPU_FX502_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400285A0UL)
#define CYREG_PERI_MS_PPU_FX502_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400285A4UL)
#define CYREG_PERI_MS_PPU_FX502_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400285B0UL)
#define CYREG_PERI_MS_PPU_FX502_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400285B4UL)
#define CYREG_PERI_MS_PPU_FX502_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400285B8UL)
#define CYREG_PERI_MS_PPU_FX502_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400285BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX503)
  */
#define CYREG_PERI_MS_PPU_FX503_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400285C0UL)
#define CYREG_PERI_MS_PPU_FX503_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400285C4UL)
#define CYREG_PERI_MS_PPU_FX503_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400285D0UL)
#define CYREG_PERI_MS_PPU_FX503_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400285D4UL)
#define CYREG_PERI_MS_PPU_FX503_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400285D8UL)
#define CYREG_PERI_MS_PPU_FX503_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400285DCUL)
#define CYREG_PERI_MS_PPU_FX503_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400285E0UL)
#define CYREG_PERI_MS_PPU_FX503_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400285E4UL)
#define CYREG_PERI_MS_PPU_FX503_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400285F0UL)
#define CYREG_PERI_MS_PPU_FX503_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400285F4UL)
#define CYREG_PERI_MS_PPU_FX503_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400285F8UL)
#define CYREG_PERI_MS_PPU_FX503_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400285FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX504)
  */
#define CYREG_PERI_MS_PPU_FX504_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028600UL)
#define CYREG_PERI_MS_PPU_FX504_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028604UL)
#define CYREG_PERI_MS_PPU_FX504_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028610UL)
#define CYREG_PERI_MS_PPU_FX504_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028614UL)
#define CYREG_PERI_MS_PPU_FX504_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028618UL)
#define CYREG_PERI_MS_PPU_FX504_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002861CUL)
#define CYREG_PERI_MS_PPU_FX504_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028620UL)
#define CYREG_PERI_MS_PPU_FX504_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028624UL)
#define CYREG_PERI_MS_PPU_FX504_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028630UL)
#define CYREG_PERI_MS_PPU_FX504_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028634UL)
#define CYREG_PERI_MS_PPU_FX504_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028638UL)
#define CYREG_PERI_MS_PPU_FX504_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002863CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX505)
  */
#define CYREG_PERI_MS_PPU_FX505_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028640UL)
#define CYREG_PERI_MS_PPU_FX505_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028644UL)
#define CYREG_PERI_MS_PPU_FX505_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028650UL)
#define CYREG_PERI_MS_PPU_FX505_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028654UL)
#define CYREG_PERI_MS_PPU_FX505_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028658UL)
#define CYREG_PERI_MS_PPU_FX505_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002865CUL)
#define CYREG_PERI_MS_PPU_FX505_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028660UL)
#define CYREG_PERI_MS_PPU_FX505_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028664UL)
#define CYREG_PERI_MS_PPU_FX505_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028670UL)
#define CYREG_PERI_MS_PPU_FX505_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028674UL)
#define CYREG_PERI_MS_PPU_FX505_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028678UL)
#define CYREG_PERI_MS_PPU_FX505_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002867CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX506)
  */
#define CYREG_PERI_MS_PPU_FX506_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028680UL)
#define CYREG_PERI_MS_PPU_FX506_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028684UL)
#define CYREG_PERI_MS_PPU_FX506_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028690UL)
#define CYREG_PERI_MS_PPU_FX506_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028694UL)
#define CYREG_PERI_MS_PPU_FX506_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028698UL)
#define CYREG_PERI_MS_PPU_FX506_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002869CUL)
#define CYREG_PERI_MS_PPU_FX506_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400286A0UL)
#define CYREG_PERI_MS_PPU_FX506_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400286A4UL)
#define CYREG_PERI_MS_PPU_FX506_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400286B0UL)
#define CYREG_PERI_MS_PPU_FX506_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400286B4UL)
#define CYREG_PERI_MS_PPU_FX506_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400286B8UL)
#define CYREG_PERI_MS_PPU_FX506_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400286BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX507)
  */
#define CYREG_PERI_MS_PPU_FX507_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400286C0UL)
#define CYREG_PERI_MS_PPU_FX507_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400286C4UL)
#define CYREG_PERI_MS_PPU_FX507_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400286D0UL)
#define CYREG_PERI_MS_PPU_FX507_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400286D4UL)
#define CYREG_PERI_MS_PPU_FX507_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400286D8UL)
#define CYREG_PERI_MS_PPU_FX507_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400286DCUL)
#define CYREG_PERI_MS_PPU_FX507_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400286E0UL)
#define CYREG_PERI_MS_PPU_FX507_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400286E4UL)
#define CYREG_PERI_MS_PPU_FX507_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400286F0UL)
#define CYREG_PERI_MS_PPU_FX507_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400286F4UL)
#define CYREG_PERI_MS_PPU_FX507_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400286F8UL)
#define CYREG_PERI_MS_PPU_FX507_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400286FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX508)
  */
#define CYREG_PERI_MS_PPU_FX508_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028700UL)
#define CYREG_PERI_MS_PPU_FX508_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028704UL)
#define CYREG_PERI_MS_PPU_FX508_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028710UL)
#define CYREG_PERI_MS_PPU_FX508_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028714UL)
#define CYREG_PERI_MS_PPU_FX508_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028718UL)
#define CYREG_PERI_MS_PPU_FX508_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002871CUL)
#define CYREG_PERI_MS_PPU_FX508_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028720UL)
#define CYREG_PERI_MS_PPU_FX508_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028724UL)
#define CYREG_PERI_MS_PPU_FX508_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028730UL)
#define CYREG_PERI_MS_PPU_FX508_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028734UL)
#define CYREG_PERI_MS_PPU_FX508_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028738UL)
#define CYREG_PERI_MS_PPU_FX508_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002873CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX509)
  */
#define CYREG_PERI_MS_PPU_FX509_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028740UL)
#define CYREG_PERI_MS_PPU_FX509_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028744UL)
#define CYREG_PERI_MS_PPU_FX509_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028750UL)
#define CYREG_PERI_MS_PPU_FX509_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028754UL)
#define CYREG_PERI_MS_PPU_FX509_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028758UL)
#define CYREG_PERI_MS_PPU_FX509_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002875CUL)
#define CYREG_PERI_MS_PPU_FX509_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028760UL)
#define CYREG_PERI_MS_PPU_FX509_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028764UL)
#define CYREG_PERI_MS_PPU_FX509_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028770UL)
#define CYREG_PERI_MS_PPU_FX509_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028774UL)
#define CYREG_PERI_MS_PPU_FX509_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028778UL)
#define CYREG_PERI_MS_PPU_FX509_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002877CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX510)
  */
#define CYREG_PERI_MS_PPU_FX510_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028780UL)
#define CYREG_PERI_MS_PPU_FX510_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028784UL)
#define CYREG_PERI_MS_PPU_FX510_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028790UL)
#define CYREG_PERI_MS_PPU_FX510_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028794UL)
#define CYREG_PERI_MS_PPU_FX510_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028798UL)
#define CYREG_PERI_MS_PPU_FX510_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002879CUL)
#define CYREG_PERI_MS_PPU_FX510_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400287A0UL)
#define CYREG_PERI_MS_PPU_FX510_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400287A4UL)
#define CYREG_PERI_MS_PPU_FX510_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400287B0UL)
#define CYREG_PERI_MS_PPU_FX510_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400287B4UL)
#define CYREG_PERI_MS_PPU_FX510_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400287B8UL)
#define CYREG_PERI_MS_PPU_FX510_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400287BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX511)
  */
#define CYREG_PERI_MS_PPU_FX511_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400287C0UL)
#define CYREG_PERI_MS_PPU_FX511_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400287C4UL)
#define CYREG_PERI_MS_PPU_FX511_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400287D0UL)
#define CYREG_PERI_MS_PPU_FX511_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400287D4UL)
#define CYREG_PERI_MS_PPU_FX511_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400287D8UL)
#define CYREG_PERI_MS_PPU_FX511_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400287DCUL)
#define CYREG_PERI_MS_PPU_FX511_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400287E0UL)
#define CYREG_PERI_MS_PPU_FX511_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400287E4UL)
#define CYREG_PERI_MS_PPU_FX511_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400287F0UL)
#define CYREG_PERI_MS_PPU_FX511_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400287F4UL)
#define CYREG_PERI_MS_PPU_FX511_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400287F8UL)
#define CYREG_PERI_MS_PPU_FX511_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400287FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX512)
  */
#define CYREG_PERI_MS_PPU_FX512_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028800UL)
#define CYREG_PERI_MS_PPU_FX512_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028804UL)
#define CYREG_PERI_MS_PPU_FX512_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028810UL)
#define CYREG_PERI_MS_PPU_FX512_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028814UL)
#define CYREG_PERI_MS_PPU_FX512_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028818UL)
#define CYREG_PERI_MS_PPU_FX512_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002881CUL)
#define CYREG_PERI_MS_PPU_FX512_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028820UL)
#define CYREG_PERI_MS_PPU_FX512_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028824UL)
#define CYREG_PERI_MS_PPU_FX512_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028830UL)
#define CYREG_PERI_MS_PPU_FX512_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028834UL)
#define CYREG_PERI_MS_PPU_FX512_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028838UL)
#define CYREG_PERI_MS_PPU_FX512_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002883CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX513)
  */
#define CYREG_PERI_MS_PPU_FX513_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028840UL)
#define CYREG_PERI_MS_PPU_FX513_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028844UL)
#define CYREG_PERI_MS_PPU_FX513_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028850UL)
#define CYREG_PERI_MS_PPU_FX513_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028854UL)
#define CYREG_PERI_MS_PPU_FX513_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028858UL)
#define CYREG_PERI_MS_PPU_FX513_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002885CUL)
#define CYREG_PERI_MS_PPU_FX513_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028860UL)
#define CYREG_PERI_MS_PPU_FX513_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028864UL)
#define CYREG_PERI_MS_PPU_FX513_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028870UL)
#define CYREG_PERI_MS_PPU_FX513_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028874UL)
#define CYREG_PERI_MS_PPU_FX513_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028878UL)
#define CYREG_PERI_MS_PPU_FX513_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002887CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX514)
  */
#define CYREG_PERI_MS_PPU_FX514_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028880UL)
#define CYREG_PERI_MS_PPU_FX514_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028884UL)
#define CYREG_PERI_MS_PPU_FX514_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028890UL)
#define CYREG_PERI_MS_PPU_FX514_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028894UL)
#define CYREG_PERI_MS_PPU_FX514_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028898UL)
#define CYREG_PERI_MS_PPU_FX514_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002889CUL)
#define CYREG_PERI_MS_PPU_FX514_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400288A0UL)
#define CYREG_PERI_MS_PPU_FX514_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400288A4UL)
#define CYREG_PERI_MS_PPU_FX514_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400288B0UL)
#define CYREG_PERI_MS_PPU_FX514_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400288B4UL)
#define CYREG_PERI_MS_PPU_FX514_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400288B8UL)
#define CYREG_PERI_MS_PPU_FX514_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400288BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX515)
  */
#define CYREG_PERI_MS_PPU_FX515_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400288C0UL)
#define CYREG_PERI_MS_PPU_FX515_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400288C4UL)
#define CYREG_PERI_MS_PPU_FX515_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400288D0UL)
#define CYREG_PERI_MS_PPU_FX515_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400288D4UL)
#define CYREG_PERI_MS_PPU_FX515_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400288D8UL)
#define CYREG_PERI_MS_PPU_FX515_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400288DCUL)
#define CYREG_PERI_MS_PPU_FX515_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400288E0UL)
#define CYREG_PERI_MS_PPU_FX515_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400288E4UL)
#define CYREG_PERI_MS_PPU_FX515_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400288F0UL)
#define CYREG_PERI_MS_PPU_FX515_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400288F4UL)
#define CYREG_PERI_MS_PPU_FX515_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400288F8UL)
#define CYREG_PERI_MS_PPU_FX515_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400288FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX516)
  */
#define CYREG_PERI_MS_PPU_FX516_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028900UL)
#define CYREG_PERI_MS_PPU_FX516_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028904UL)
#define CYREG_PERI_MS_PPU_FX516_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028910UL)
#define CYREG_PERI_MS_PPU_FX516_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028914UL)
#define CYREG_PERI_MS_PPU_FX516_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028918UL)
#define CYREG_PERI_MS_PPU_FX516_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002891CUL)
#define CYREG_PERI_MS_PPU_FX516_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028920UL)
#define CYREG_PERI_MS_PPU_FX516_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028924UL)
#define CYREG_PERI_MS_PPU_FX516_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028930UL)
#define CYREG_PERI_MS_PPU_FX516_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028934UL)
#define CYREG_PERI_MS_PPU_FX516_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028938UL)
#define CYREG_PERI_MS_PPU_FX516_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002893CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX517)
  */
#define CYREG_PERI_MS_PPU_FX517_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028940UL)
#define CYREG_PERI_MS_PPU_FX517_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028944UL)
#define CYREG_PERI_MS_PPU_FX517_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028950UL)
#define CYREG_PERI_MS_PPU_FX517_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028954UL)
#define CYREG_PERI_MS_PPU_FX517_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028958UL)
#define CYREG_PERI_MS_PPU_FX517_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002895CUL)
#define CYREG_PERI_MS_PPU_FX517_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028960UL)
#define CYREG_PERI_MS_PPU_FX517_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028964UL)
#define CYREG_PERI_MS_PPU_FX517_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028970UL)
#define CYREG_PERI_MS_PPU_FX517_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028974UL)
#define CYREG_PERI_MS_PPU_FX517_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028978UL)
#define CYREG_PERI_MS_PPU_FX517_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002897CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX518)
  */
#define CYREG_PERI_MS_PPU_FX518_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028980UL)
#define CYREG_PERI_MS_PPU_FX518_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028984UL)
#define CYREG_PERI_MS_PPU_FX518_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028990UL)
#define CYREG_PERI_MS_PPU_FX518_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028994UL)
#define CYREG_PERI_MS_PPU_FX518_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028998UL)
#define CYREG_PERI_MS_PPU_FX518_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002899CUL)
#define CYREG_PERI_MS_PPU_FX518_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400289A0UL)
#define CYREG_PERI_MS_PPU_FX518_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400289A4UL)
#define CYREG_PERI_MS_PPU_FX518_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400289B0UL)
#define CYREG_PERI_MS_PPU_FX518_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400289B4UL)
#define CYREG_PERI_MS_PPU_FX518_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400289B8UL)
#define CYREG_PERI_MS_PPU_FX518_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400289BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX519)
  */
#define CYREG_PERI_MS_PPU_FX519_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400289C0UL)
#define CYREG_PERI_MS_PPU_FX519_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400289C4UL)
#define CYREG_PERI_MS_PPU_FX519_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400289D0UL)
#define CYREG_PERI_MS_PPU_FX519_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400289D4UL)
#define CYREG_PERI_MS_PPU_FX519_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400289D8UL)
#define CYREG_PERI_MS_PPU_FX519_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400289DCUL)
#define CYREG_PERI_MS_PPU_FX519_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400289E0UL)
#define CYREG_PERI_MS_PPU_FX519_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400289E4UL)
#define CYREG_PERI_MS_PPU_FX519_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400289F0UL)
#define CYREG_PERI_MS_PPU_FX519_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400289F4UL)
#define CYREG_PERI_MS_PPU_FX519_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400289F8UL)
#define CYREG_PERI_MS_PPU_FX519_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400289FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX520)
  */
#define CYREG_PERI_MS_PPU_FX520_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028A00UL)
#define CYREG_PERI_MS_PPU_FX520_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028A04UL)
#define CYREG_PERI_MS_PPU_FX520_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028A10UL)
#define CYREG_PERI_MS_PPU_FX520_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028A14UL)
#define CYREG_PERI_MS_PPU_FX520_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028A18UL)
#define CYREG_PERI_MS_PPU_FX520_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028A1CUL)
#define CYREG_PERI_MS_PPU_FX520_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028A20UL)
#define CYREG_PERI_MS_PPU_FX520_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028A24UL)
#define CYREG_PERI_MS_PPU_FX520_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028A30UL)
#define CYREG_PERI_MS_PPU_FX520_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028A34UL)
#define CYREG_PERI_MS_PPU_FX520_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028A38UL)
#define CYREG_PERI_MS_PPU_FX520_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028A3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX521)
  */
#define CYREG_PERI_MS_PPU_FX521_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028A40UL)
#define CYREG_PERI_MS_PPU_FX521_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028A44UL)
#define CYREG_PERI_MS_PPU_FX521_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028A50UL)
#define CYREG_PERI_MS_PPU_FX521_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028A54UL)
#define CYREG_PERI_MS_PPU_FX521_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028A58UL)
#define CYREG_PERI_MS_PPU_FX521_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028A5CUL)
#define CYREG_PERI_MS_PPU_FX521_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028A60UL)
#define CYREG_PERI_MS_PPU_FX521_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028A64UL)
#define CYREG_PERI_MS_PPU_FX521_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028A70UL)
#define CYREG_PERI_MS_PPU_FX521_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028A74UL)
#define CYREG_PERI_MS_PPU_FX521_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028A78UL)
#define CYREG_PERI_MS_PPU_FX521_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028A7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX522)
  */
#define CYREG_PERI_MS_PPU_FX522_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028A80UL)
#define CYREG_PERI_MS_PPU_FX522_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028A84UL)
#define CYREG_PERI_MS_PPU_FX522_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028A90UL)
#define CYREG_PERI_MS_PPU_FX522_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028A94UL)
#define CYREG_PERI_MS_PPU_FX522_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028A98UL)
#define CYREG_PERI_MS_PPU_FX522_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028A9CUL)
#define CYREG_PERI_MS_PPU_FX522_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028AA0UL)
#define CYREG_PERI_MS_PPU_FX522_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028AA4UL)
#define CYREG_PERI_MS_PPU_FX522_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028AB0UL)
#define CYREG_PERI_MS_PPU_FX522_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028AB4UL)
#define CYREG_PERI_MS_PPU_FX522_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028AB8UL)
#define CYREG_PERI_MS_PPU_FX522_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028ABCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX523)
  */
#define CYREG_PERI_MS_PPU_FX523_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028AC0UL)
#define CYREG_PERI_MS_PPU_FX523_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028AC4UL)
#define CYREG_PERI_MS_PPU_FX523_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028AD0UL)
#define CYREG_PERI_MS_PPU_FX523_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028AD4UL)
#define CYREG_PERI_MS_PPU_FX523_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028AD8UL)
#define CYREG_PERI_MS_PPU_FX523_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028ADCUL)
#define CYREG_PERI_MS_PPU_FX523_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028AE0UL)
#define CYREG_PERI_MS_PPU_FX523_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028AE4UL)
#define CYREG_PERI_MS_PPU_FX523_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028AF0UL)
#define CYREG_PERI_MS_PPU_FX523_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028AF4UL)
#define CYREG_PERI_MS_PPU_FX523_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028AF8UL)
#define CYREG_PERI_MS_PPU_FX523_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028AFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX524)
  */
#define CYREG_PERI_MS_PPU_FX524_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028B00UL)
#define CYREG_PERI_MS_PPU_FX524_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028B04UL)
#define CYREG_PERI_MS_PPU_FX524_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028B10UL)
#define CYREG_PERI_MS_PPU_FX524_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028B14UL)
#define CYREG_PERI_MS_PPU_FX524_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028B18UL)
#define CYREG_PERI_MS_PPU_FX524_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028B1CUL)
#define CYREG_PERI_MS_PPU_FX524_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028B20UL)
#define CYREG_PERI_MS_PPU_FX524_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028B24UL)
#define CYREG_PERI_MS_PPU_FX524_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028B30UL)
#define CYREG_PERI_MS_PPU_FX524_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028B34UL)
#define CYREG_PERI_MS_PPU_FX524_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028B38UL)
#define CYREG_PERI_MS_PPU_FX524_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028B3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX525)
  */
#define CYREG_PERI_MS_PPU_FX525_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028B40UL)
#define CYREG_PERI_MS_PPU_FX525_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028B44UL)
#define CYREG_PERI_MS_PPU_FX525_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028B50UL)
#define CYREG_PERI_MS_PPU_FX525_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028B54UL)
#define CYREG_PERI_MS_PPU_FX525_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028B58UL)
#define CYREG_PERI_MS_PPU_FX525_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028B5CUL)
#define CYREG_PERI_MS_PPU_FX525_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028B60UL)
#define CYREG_PERI_MS_PPU_FX525_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028B64UL)
#define CYREG_PERI_MS_PPU_FX525_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028B70UL)
#define CYREG_PERI_MS_PPU_FX525_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028B74UL)
#define CYREG_PERI_MS_PPU_FX525_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028B78UL)
#define CYREG_PERI_MS_PPU_FX525_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028B7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX526)
  */
#define CYREG_PERI_MS_PPU_FX526_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028B80UL)
#define CYREG_PERI_MS_PPU_FX526_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028B84UL)
#define CYREG_PERI_MS_PPU_FX526_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028B90UL)
#define CYREG_PERI_MS_PPU_FX526_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028B94UL)
#define CYREG_PERI_MS_PPU_FX526_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028B98UL)
#define CYREG_PERI_MS_PPU_FX526_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028B9CUL)
#define CYREG_PERI_MS_PPU_FX526_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028BA0UL)
#define CYREG_PERI_MS_PPU_FX526_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028BA4UL)
#define CYREG_PERI_MS_PPU_FX526_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028BB0UL)
#define CYREG_PERI_MS_PPU_FX526_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028BB4UL)
#define CYREG_PERI_MS_PPU_FX526_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028BB8UL)
#define CYREG_PERI_MS_PPU_FX526_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028BBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX527)
  */
#define CYREG_PERI_MS_PPU_FX527_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028BC0UL)
#define CYREG_PERI_MS_PPU_FX527_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028BC4UL)
#define CYREG_PERI_MS_PPU_FX527_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028BD0UL)
#define CYREG_PERI_MS_PPU_FX527_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028BD4UL)
#define CYREG_PERI_MS_PPU_FX527_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028BD8UL)
#define CYREG_PERI_MS_PPU_FX527_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028BDCUL)
#define CYREG_PERI_MS_PPU_FX527_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028BE0UL)
#define CYREG_PERI_MS_PPU_FX527_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028BE4UL)
#define CYREG_PERI_MS_PPU_FX527_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028BF0UL)
#define CYREG_PERI_MS_PPU_FX527_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028BF4UL)
#define CYREG_PERI_MS_PPU_FX527_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028BF8UL)
#define CYREG_PERI_MS_PPU_FX527_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028BFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX528)
  */
#define CYREG_PERI_MS_PPU_FX528_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028C00UL)
#define CYREG_PERI_MS_PPU_FX528_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028C04UL)
#define CYREG_PERI_MS_PPU_FX528_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028C10UL)
#define CYREG_PERI_MS_PPU_FX528_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028C14UL)
#define CYREG_PERI_MS_PPU_FX528_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028C18UL)
#define CYREG_PERI_MS_PPU_FX528_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028C1CUL)
#define CYREG_PERI_MS_PPU_FX528_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028C20UL)
#define CYREG_PERI_MS_PPU_FX528_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028C24UL)
#define CYREG_PERI_MS_PPU_FX528_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028C30UL)
#define CYREG_PERI_MS_PPU_FX528_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028C34UL)
#define CYREG_PERI_MS_PPU_FX528_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028C38UL)
#define CYREG_PERI_MS_PPU_FX528_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028C3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX529)
  */
#define CYREG_PERI_MS_PPU_FX529_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028C40UL)
#define CYREG_PERI_MS_PPU_FX529_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028C44UL)
#define CYREG_PERI_MS_PPU_FX529_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028C50UL)
#define CYREG_PERI_MS_PPU_FX529_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028C54UL)
#define CYREG_PERI_MS_PPU_FX529_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028C58UL)
#define CYREG_PERI_MS_PPU_FX529_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028C5CUL)
#define CYREG_PERI_MS_PPU_FX529_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028C60UL)
#define CYREG_PERI_MS_PPU_FX529_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028C64UL)
#define CYREG_PERI_MS_PPU_FX529_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028C70UL)
#define CYREG_PERI_MS_PPU_FX529_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028C74UL)
#define CYREG_PERI_MS_PPU_FX529_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028C78UL)
#define CYREG_PERI_MS_PPU_FX529_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028C7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX530)
  */
#define CYREG_PERI_MS_PPU_FX530_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028C80UL)
#define CYREG_PERI_MS_PPU_FX530_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028C84UL)
#define CYREG_PERI_MS_PPU_FX530_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028C90UL)
#define CYREG_PERI_MS_PPU_FX530_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028C94UL)
#define CYREG_PERI_MS_PPU_FX530_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028C98UL)
#define CYREG_PERI_MS_PPU_FX530_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028C9CUL)
#define CYREG_PERI_MS_PPU_FX530_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028CA0UL)
#define CYREG_PERI_MS_PPU_FX530_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028CA4UL)
#define CYREG_PERI_MS_PPU_FX530_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028CB0UL)
#define CYREG_PERI_MS_PPU_FX530_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028CB4UL)
#define CYREG_PERI_MS_PPU_FX530_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028CB8UL)
#define CYREG_PERI_MS_PPU_FX530_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028CBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX531)
  */
#define CYREG_PERI_MS_PPU_FX531_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028CC0UL)
#define CYREG_PERI_MS_PPU_FX531_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028CC4UL)
#define CYREG_PERI_MS_PPU_FX531_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028CD0UL)
#define CYREG_PERI_MS_PPU_FX531_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028CD4UL)
#define CYREG_PERI_MS_PPU_FX531_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028CD8UL)
#define CYREG_PERI_MS_PPU_FX531_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028CDCUL)
#define CYREG_PERI_MS_PPU_FX531_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028CE0UL)
#define CYREG_PERI_MS_PPU_FX531_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028CE4UL)
#define CYREG_PERI_MS_PPU_FX531_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028CF0UL)
#define CYREG_PERI_MS_PPU_FX531_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028CF4UL)
#define CYREG_PERI_MS_PPU_FX531_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028CF8UL)
#define CYREG_PERI_MS_PPU_FX531_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028CFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX532)
  */
#define CYREG_PERI_MS_PPU_FX532_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028D00UL)
#define CYREG_PERI_MS_PPU_FX532_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028D04UL)
#define CYREG_PERI_MS_PPU_FX532_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028D10UL)
#define CYREG_PERI_MS_PPU_FX532_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028D14UL)
#define CYREG_PERI_MS_PPU_FX532_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028D18UL)
#define CYREG_PERI_MS_PPU_FX532_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028D1CUL)
#define CYREG_PERI_MS_PPU_FX532_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028D20UL)
#define CYREG_PERI_MS_PPU_FX532_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028D24UL)
#define CYREG_PERI_MS_PPU_FX532_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028D30UL)
#define CYREG_PERI_MS_PPU_FX532_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028D34UL)
#define CYREG_PERI_MS_PPU_FX532_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028D38UL)
#define CYREG_PERI_MS_PPU_FX532_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028D3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX533)
  */
#define CYREG_PERI_MS_PPU_FX533_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028D40UL)
#define CYREG_PERI_MS_PPU_FX533_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028D44UL)
#define CYREG_PERI_MS_PPU_FX533_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028D50UL)
#define CYREG_PERI_MS_PPU_FX533_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028D54UL)
#define CYREG_PERI_MS_PPU_FX533_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028D58UL)
#define CYREG_PERI_MS_PPU_FX533_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028D5CUL)
#define CYREG_PERI_MS_PPU_FX533_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028D60UL)
#define CYREG_PERI_MS_PPU_FX533_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028D64UL)
#define CYREG_PERI_MS_PPU_FX533_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028D70UL)
#define CYREG_PERI_MS_PPU_FX533_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028D74UL)
#define CYREG_PERI_MS_PPU_FX533_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028D78UL)
#define CYREG_PERI_MS_PPU_FX533_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028D7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX534)
  */
#define CYREG_PERI_MS_PPU_FX534_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028D80UL)
#define CYREG_PERI_MS_PPU_FX534_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028D84UL)
#define CYREG_PERI_MS_PPU_FX534_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028D90UL)
#define CYREG_PERI_MS_PPU_FX534_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028D94UL)
#define CYREG_PERI_MS_PPU_FX534_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028D98UL)
#define CYREG_PERI_MS_PPU_FX534_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028D9CUL)
#define CYREG_PERI_MS_PPU_FX534_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028DA0UL)
#define CYREG_PERI_MS_PPU_FX534_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028DA4UL)
#define CYREG_PERI_MS_PPU_FX534_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028DB0UL)
#define CYREG_PERI_MS_PPU_FX534_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028DB4UL)
#define CYREG_PERI_MS_PPU_FX534_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028DB8UL)
#define CYREG_PERI_MS_PPU_FX534_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028DBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX535)
  */
#define CYREG_PERI_MS_PPU_FX535_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028DC0UL)
#define CYREG_PERI_MS_PPU_FX535_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028DC4UL)
#define CYREG_PERI_MS_PPU_FX535_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028DD0UL)
#define CYREG_PERI_MS_PPU_FX535_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028DD4UL)
#define CYREG_PERI_MS_PPU_FX535_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028DD8UL)
#define CYREG_PERI_MS_PPU_FX535_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028DDCUL)
#define CYREG_PERI_MS_PPU_FX535_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028DE0UL)
#define CYREG_PERI_MS_PPU_FX535_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028DE4UL)
#define CYREG_PERI_MS_PPU_FX535_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028DF0UL)
#define CYREG_PERI_MS_PPU_FX535_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028DF4UL)
#define CYREG_PERI_MS_PPU_FX535_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028DF8UL)
#define CYREG_PERI_MS_PPU_FX535_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028DFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX536)
  */
#define CYREG_PERI_MS_PPU_FX536_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028E00UL)
#define CYREG_PERI_MS_PPU_FX536_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028E04UL)
#define CYREG_PERI_MS_PPU_FX536_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028E10UL)
#define CYREG_PERI_MS_PPU_FX536_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028E14UL)
#define CYREG_PERI_MS_PPU_FX536_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028E18UL)
#define CYREG_PERI_MS_PPU_FX536_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028E1CUL)
#define CYREG_PERI_MS_PPU_FX536_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028E20UL)
#define CYREG_PERI_MS_PPU_FX536_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028E24UL)
#define CYREG_PERI_MS_PPU_FX536_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028E30UL)
#define CYREG_PERI_MS_PPU_FX536_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028E34UL)
#define CYREG_PERI_MS_PPU_FX536_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028E38UL)
#define CYREG_PERI_MS_PPU_FX536_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028E3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX537)
  */
#define CYREG_PERI_MS_PPU_FX537_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028E40UL)
#define CYREG_PERI_MS_PPU_FX537_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028E44UL)
#define CYREG_PERI_MS_PPU_FX537_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028E50UL)
#define CYREG_PERI_MS_PPU_FX537_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028E54UL)
#define CYREG_PERI_MS_PPU_FX537_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028E58UL)
#define CYREG_PERI_MS_PPU_FX537_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028E5CUL)
#define CYREG_PERI_MS_PPU_FX537_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028E60UL)
#define CYREG_PERI_MS_PPU_FX537_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028E64UL)
#define CYREG_PERI_MS_PPU_FX537_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028E70UL)
#define CYREG_PERI_MS_PPU_FX537_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028E74UL)
#define CYREG_PERI_MS_PPU_FX537_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028E78UL)
#define CYREG_PERI_MS_PPU_FX537_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028E7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX538)
  */
#define CYREG_PERI_MS_PPU_FX538_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028E80UL)
#define CYREG_PERI_MS_PPU_FX538_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028E84UL)
#define CYREG_PERI_MS_PPU_FX538_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028E90UL)
#define CYREG_PERI_MS_PPU_FX538_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028E94UL)
#define CYREG_PERI_MS_PPU_FX538_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028E98UL)
#define CYREG_PERI_MS_PPU_FX538_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028E9CUL)
#define CYREG_PERI_MS_PPU_FX538_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028EA0UL)
#define CYREG_PERI_MS_PPU_FX538_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028EA4UL)
#define CYREG_PERI_MS_PPU_FX538_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028EB0UL)
#define CYREG_PERI_MS_PPU_FX538_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028EB4UL)
#define CYREG_PERI_MS_PPU_FX538_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028EB8UL)
#define CYREG_PERI_MS_PPU_FX538_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028EBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX539)
  */
#define CYREG_PERI_MS_PPU_FX539_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028EC0UL)
#define CYREG_PERI_MS_PPU_FX539_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028EC4UL)
#define CYREG_PERI_MS_PPU_FX539_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028ED0UL)
#define CYREG_PERI_MS_PPU_FX539_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028ED4UL)
#define CYREG_PERI_MS_PPU_FX539_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028ED8UL)
#define CYREG_PERI_MS_PPU_FX539_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028EDCUL)
#define CYREG_PERI_MS_PPU_FX539_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028EE0UL)
#define CYREG_PERI_MS_PPU_FX539_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028EE4UL)
#define CYREG_PERI_MS_PPU_FX539_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028EF0UL)
#define CYREG_PERI_MS_PPU_FX539_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028EF4UL)
#define CYREG_PERI_MS_PPU_FX539_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028EF8UL)
#define CYREG_PERI_MS_PPU_FX539_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028EFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX540)
  */
#define CYREG_PERI_MS_PPU_FX540_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028F00UL)
#define CYREG_PERI_MS_PPU_FX540_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028F04UL)
#define CYREG_PERI_MS_PPU_FX540_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028F10UL)
#define CYREG_PERI_MS_PPU_FX540_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028F14UL)
#define CYREG_PERI_MS_PPU_FX540_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028F18UL)
#define CYREG_PERI_MS_PPU_FX540_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028F1CUL)
#define CYREG_PERI_MS_PPU_FX540_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028F20UL)
#define CYREG_PERI_MS_PPU_FX540_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028F24UL)
#define CYREG_PERI_MS_PPU_FX540_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028F30UL)
#define CYREG_PERI_MS_PPU_FX540_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028F34UL)
#define CYREG_PERI_MS_PPU_FX540_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028F38UL)
#define CYREG_PERI_MS_PPU_FX540_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028F3CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX541)
  */
#define CYREG_PERI_MS_PPU_FX541_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028F40UL)
#define CYREG_PERI_MS_PPU_FX541_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028F44UL)
#define CYREG_PERI_MS_PPU_FX541_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028F50UL)
#define CYREG_PERI_MS_PPU_FX541_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028F54UL)
#define CYREG_PERI_MS_PPU_FX541_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028F58UL)
#define CYREG_PERI_MS_PPU_FX541_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028F5CUL)
#define CYREG_PERI_MS_PPU_FX541_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028F60UL)
#define CYREG_PERI_MS_PPU_FX541_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028F64UL)
#define CYREG_PERI_MS_PPU_FX541_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028F70UL)
#define CYREG_PERI_MS_PPU_FX541_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028F74UL)
#define CYREG_PERI_MS_PPU_FX541_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028F78UL)
#define CYREG_PERI_MS_PPU_FX541_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028F7CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX542)
  */
#define CYREG_PERI_MS_PPU_FX542_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028F80UL)
#define CYREG_PERI_MS_PPU_FX542_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028F84UL)
#define CYREG_PERI_MS_PPU_FX542_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028F90UL)
#define CYREG_PERI_MS_PPU_FX542_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028F94UL)
#define CYREG_PERI_MS_PPU_FX542_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028F98UL)
#define CYREG_PERI_MS_PPU_FX542_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028F9CUL)
#define CYREG_PERI_MS_PPU_FX542_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028FA0UL)
#define CYREG_PERI_MS_PPU_FX542_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028FA4UL)
#define CYREG_PERI_MS_PPU_FX542_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028FB0UL)
#define CYREG_PERI_MS_PPU_FX542_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028FB4UL)
#define CYREG_PERI_MS_PPU_FX542_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028FB8UL)
#define CYREG_PERI_MS_PPU_FX542_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028FBCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX543)
  */
#define CYREG_PERI_MS_PPU_FX543_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40028FC0UL)
#define CYREG_PERI_MS_PPU_FX543_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40028FC4UL)
#define CYREG_PERI_MS_PPU_FX543_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40028FD0UL)
#define CYREG_PERI_MS_PPU_FX543_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40028FD4UL)
#define CYREG_PERI_MS_PPU_FX543_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40028FD8UL)
#define CYREG_PERI_MS_PPU_FX543_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x40028FDCUL)
#define CYREG_PERI_MS_PPU_FX543_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40028FE0UL)
#define CYREG_PERI_MS_PPU_FX543_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40028FE4UL)
#define CYREG_PERI_MS_PPU_FX543_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40028FF0UL)
#define CYREG_PERI_MS_PPU_FX543_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40028FF4UL)
#define CYREG_PERI_MS_PPU_FX543_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40028FF8UL)
#define CYREG_PERI_MS_PPU_FX543_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x40028FFCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX544)
  */
#define CYREG_PERI_MS_PPU_FX544_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029000UL)
#define CYREG_PERI_MS_PPU_FX544_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029004UL)
#define CYREG_PERI_MS_PPU_FX544_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029010UL)
#define CYREG_PERI_MS_PPU_FX544_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029014UL)
#define CYREG_PERI_MS_PPU_FX544_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029018UL)
#define CYREG_PERI_MS_PPU_FX544_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002901CUL)
#define CYREG_PERI_MS_PPU_FX544_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029020UL)
#define CYREG_PERI_MS_PPU_FX544_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029024UL)
#define CYREG_PERI_MS_PPU_FX544_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029030UL)
#define CYREG_PERI_MS_PPU_FX544_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029034UL)
#define CYREG_PERI_MS_PPU_FX544_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029038UL)
#define CYREG_PERI_MS_PPU_FX544_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002903CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX545)
  */
#define CYREG_PERI_MS_PPU_FX545_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029040UL)
#define CYREG_PERI_MS_PPU_FX545_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029044UL)
#define CYREG_PERI_MS_PPU_FX545_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029050UL)
#define CYREG_PERI_MS_PPU_FX545_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029054UL)
#define CYREG_PERI_MS_PPU_FX545_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029058UL)
#define CYREG_PERI_MS_PPU_FX545_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002905CUL)
#define CYREG_PERI_MS_PPU_FX545_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029060UL)
#define CYREG_PERI_MS_PPU_FX545_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029064UL)
#define CYREG_PERI_MS_PPU_FX545_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029070UL)
#define CYREG_PERI_MS_PPU_FX545_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029074UL)
#define CYREG_PERI_MS_PPU_FX545_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029078UL)
#define CYREG_PERI_MS_PPU_FX545_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002907CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX546)
  */
#define CYREG_PERI_MS_PPU_FX546_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029080UL)
#define CYREG_PERI_MS_PPU_FX546_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029084UL)
#define CYREG_PERI_MS_PPU_FX546_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029090UL)
#define CYREG_PERI_MS_PPU_FX546_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029094UL)
#define CYREG_PERI_MS_PPU_FX546_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029098UL)
#define CYREG_PERI_MS_PPU_FX546_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002909CUL)
#define CYREG_PERI_MS_PPU_FX546_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400290A0UL)
#define CYREG_PERI_MS_PPU_FX546_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400290A4UL)
#define CYREG_PERI_MS_PPU_FX546_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400290B0UL)
#define CYREG_PERI_MS_PPU_FX546_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400290B4UL)
#define CYREG_PERI_MS_PPU_FX546_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400290B8UL)
#define CYREG_PERI_MS_PPU_FX546_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400290BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX547)
  */
#define CYREG_PERI_MS_PPU_FX547_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400290C0UL)
#define CYREG_PERI_MS_PPU_FX547_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400290C4UL)
#define CYREG_PERI_MS_PPU_FX547_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400290D0UL)
#define CYREG_PERI_MS_PPU_FX547_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400290D4UL)
#define CYREG_PERI_MS_PPU_FX547_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400290D8UL)
#define CYREG_PERI_MS_PPU_FX547_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400290DCUL)
#define CYREG_PERI_MS_PPU_FX547_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400290E0UL)
#define CYREG_PERI_MS_PPU_FX547_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400290E4UL)
#define CYREG_PERI_MS_PPU_FX547_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400290F0UL)
#define CYREG_PERI_MS_PPU_FX547_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400290F4UL)
#define CYREG_PERI_MS_PPU_FX547_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400290F8UL)
#define CYREG_PERI_MS_PPU_FX547_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400290FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX548)
  */
#define CYREG_PERI_MS_PPU_FX548_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029100UL)
#define CYREG_PERI_MS_PPU_FX548_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029104UL)
#define CYREG_PERI_MS_PPU_FX548_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029110UL)
#define CYREG_PERI_MS_PPU_FX548_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029114UL)
#define CYREG_PERI_MS_PPU_FX548_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029118UL)
#define CYREG_PERI_MS_PPU_FX548_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002911CUL)
#define CYREG_PERI_MS_PPU_FX548_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029120UL)
#define CYREG_PERI_MS_PPU_FX548_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029124UL)
#define CYREG_PERI_MS_PPU_FX548_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029130UL)
#define CYREG_PERI_MS_PPU_FX548_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029134UL)
#define CYREG_PERI_MS_PPU_FX548_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029138UL)
#define CYREG_PERI_MS_PPU_FX548_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002913CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX549)
  */
#define CYREG_PERI_MS_PPU_FX549_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029140UL)
#define CYREG_PERI_MS_PPU_FX549_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029144UL)
#define CYREG_PERI_MS_PPU_FX549_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029150UL)
#define CYREG_PERI_MS_PPU_FX549_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029154UL)
#define CYREG_PERI_MS_PPU_FX549_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029158UL)
#define CYREG_PERI_MS_PPU_FX549_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002915CUL)
#define CYREG_PERI_MS_PPU_FX549_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029160UL)
#define CYREG_PERI_MS_PPU_FX549_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029164UL)
#define CYREG_PERI_MS_PPU_FX549_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029170UL)
#define CYREG_PERI_MS_PPU_FX549_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029174UL)
#define CYREG_PERI_MS_PPU_FX549_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029178UL)
#define CYREG_PERI_MS_PPU_FX549_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002917CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX550)
  */
#define CYREG_PERI_MS_PPU_FX550_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029180UL)
#define CYREG_PERI_MS_PPU_FX550_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029184UL)
#define CYREG_PERI_MS_PPU_FX550_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029190UL)
#define CYREG_PERI_MS_PPU_FX550_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029194UL)
#define CYREG_PERI_MS_PPU_FX550_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029198UL)
#define CYREG_PERI_MS_PPU_FX550_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002919CUL)
#define CYREG_PERI_MS_PPU_FX550_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400291A0UL)
#define CYREG_PERI_MS_PPU_FX550_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400291A4UL)
#define CYREG_PERI_MS_PPU_FX550_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400291B0UL)
#define CYREG_PERI_MS_PPU_FX550_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400291B4UL)
#define CYREG_PERI_MS_PPU_FX550_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400291B8UL)
#define CYREG_PERI_MS_PPU_FX550_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400291BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX551)
  */
#define CYREG_PERI_MS_PPU_FX551_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400291C0UL)
#define CYREG_PERI_MS_PPU_FX551_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400291C4UL)
#define CYREG_PERI_MS_PPU_FX551_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400291D0UL)
#define CYREG_PERI_MS_PPU_FX551_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400291D4UL)
#define CYREG_PERI_MS_PPU_FX551_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400291D8UL)
#define CYREG_PERI_MS_PPU_FX551_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400291DCUL)
#define CYREG_PERI_MS_PPU_FX551_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400291E0UL)
#define CYREG_PERI_MS_PPU_FX551_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400291E4UL)
#define CYREG_PERI_MS_PPU_FX551_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400291F0UL)
#define CYREG_PERI_MS_PPU_FX551_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400291F4UL)
#define CYREG_PERI_MS_PPU_FX551_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400291F8UL)
#define CYREG_PERI_MS_PPU_FX551_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400291FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX552)
  */
#define CYREG_PERI_MS_PPU_FX552_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029200UL)
#define CYREG_PERI_MS_PPU_FX552_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029204UL)
#define CYREG_PERI_MS_PPU_FX552_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029210UL)
#define CYREG_PERI_MS_PPU_FX552_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029214UL)
#define CYREG_PERI_MS_PPU_FX552_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029218UL)
#define CYREG_PERI_MS_PPU_FX552_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002921CUL)
#define CYREG_PERI_MS_PPU_FX552_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029220UL)
#define CYREG_PERI_MS_PPU_FX552_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029224UL)
#define CYREG_PERI_MS_PPU_FX552_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029230UL)
#define CYREG_PERI_MS_PPU_FX552_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029234UL)
#define CYREG_PERI_MS_PPU_FX552_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029238UL)
#define CYREG_PERI_MS_PPU_FX552_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002923CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX553)
  */
#define CYREG_PERI_MS_PPU_FX553_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029240UL)
#define CYREG_PERI_MS_PPU_FX553_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029244UL)
#define CYREG_PERI_MS_PPU_FX553_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029250UL)
#define CYREG_PERI_MS_PPU_FX553_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029254UL)
#define CYREG_PERI_MS_PPU_FX553_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029258UL)
#define CYREG_PERI_MS_PPU_FX553_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002925CUL)
#define CYREG_PERI_MS_PPU_FX553_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029260UL)
#define CYREG_PERI_MS_PPU_FX553_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029264UL)
#define CYREG_PERI_MS_PPU_FX553_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029270UL)
#define CYREG_PERI_MS_PPU_FX553_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029274UL)
#define CYREG_PERI_MS_PPU_FX553_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029278UL)
#define CYREG_PERI_MS_PPU_FX553_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002927CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX554)
  */
#define CYREG_PERI_MS_PPU_FX554_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029280UL)
#define CYREG_PERI_MS_PPU_FX554_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029284UL)
#define CYREG_PERI_MS_PPU_FX554_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029290UL)
#define CYREG_PERI_MS_PPU_FX554_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029294UL)
#define CYREG_PERI_MS_PPU_FX554_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029298UL)
#define CYREG_PERI_MS_PPU_FX554_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002929CUL)
#define CYREG_PERI_MS_PPU_FX554_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400292A0UL)
#define CYREG_PERI_MS_PPU_FX554_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400292A4UL)
#define CYREG_PERI_MS_PPU_FX554_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400292B0UL)
#define CYREG_PERI_MS_PPU_FX554_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400292B4UL)
#define CYREG_PERI_MS_PPU_FX554_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400292B8UL)
#define CYREG_PERI_MS_PPU_FX554_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400292BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX555)
  */
#define CYREG_PERI_MS_PPU_FX555_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400292C0UL)
#define CYREG_PERI_MS_PPU_FX555_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400292C4UL)
#define CYREG_PERI_MS_PPU_FX555_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400292D0UL)
#define CYREG_PERI_MS_PPU_FX555_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400292D4UL)
#define CYREG_PERI_MS_PPU_FX555_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400292D8UL)
#define CYREG_PERI_MS_PPU_FX555_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400292DCUL)
#define CYREG_PERI_MS_PPU_FX555_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400292E0UL)
#define CYREG_PERI_MS_PPU_FX555_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400292E4UL)
#define CYREG_PERI_MS_PPU_FX555_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400292F0UL)
#define CYREG_PERI_MS_PPU_FX555_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400292F4UL)
#define CYREG_PERI_MS_PPU_FX555_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400292F8UL)
#define CYREG_PERI_MS_PPU_FX555_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400292FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX556)
  */
#define CYREG_PERI_MS_PPU_FX556_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029300UL)
#define CYREG_PERI_MS_PPU_FX556_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029304UL)
#define CYREG_PERI_MS_PPU_FX556_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029310UL)
#define CYREG_PERI_MS_PPU_FX556_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029314UL)
#define CYREG_PERI_MS_PPU_FX556_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029318UL)
#define CYREG_PERI_MS_PPU_FX556_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002931CUL)
#define CYREG_PERI_MS_PPU_FX556_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029320UL)
#define CYREG_PERI_MS_PPU_FX556_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029324UL)
#define CYREG_PERI_MS_PPU_FX556_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029330UL)
#define CYREG_PERI_MS_PPU_FX556_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029334UL)
#define CYREG_PERI_MS_PPU_FX556_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029338UL)
#define CYREG_PERI_MS_PPU_FX556_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002933CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX557)
  */
#define CYREG_PERI_MS_PPU_FX557_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029340UL)
#define CYREG_PERI_MS_PPU_FX557_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029344UL)
#define CYREG_PERI_MS_PPU_FX557_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029350UL)
#define CYREG_PERI_MS_PPU_FX557_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029354UL)
#define CYREG_PERI_MS_PPU_FX557_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029358UL)
#define CYREG_PERI_MS_PPU_FX557_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002935CUL)
#define CYREG_PERI_MS_PPU_FX557_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029360UL)
#define CYREG_PERI_MS_PPU_FX557_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029364UL)
#define CYREG_PERI_MS_PPU_FX557_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029370UL)
#define CYREG_PERI_MS_PPU_FX557_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029374UL)
#define CYREG_PERI_MS_PPU_FX557_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029378UL)
#define CYREG_PERI_MS_PPU_FX557_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002937CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX558)
  */
#define CYREG_PERI_MS_PPU_FX558_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029380UL)
#define CYREG_PERI_MS_PPU_FX558_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029384UL)
#define CYREG_PERI_MS_PPU_FX558_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029390UL)
#define CYREG_PERI_MS_PPU_FX558_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029394UL)
#define CYREG_PERI_MS_PPU_FX558_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029398UL)
#define CYREG_PERI_MS_PPU_FX558_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002939CUL)
#define CYREG_PERI_MS_PPU_FX558_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400293A0UL)
#define CYREG_PERI_MS_PPU_FX558_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400293A4UL)
#define CYREG_PERI_MS_PPU_FX558_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400293B0UL)
#define CYREG_PERI_MS_PPU_FX558_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400293B4UL)
#define CYREG_PERI_MS_PPU_FX558_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400293B8UL)
#define CYREG_PERI_MS_PPU_FX558_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400293BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX559)
  */
#define CYREG_PERI_MS_PPU_FX559_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400293C0UL)
#define CYREG_PERI_MS_PPU_FX559_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400293C4UL)
#define CYREG_PERI_MS_PPU_FX559_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400293D0UL)
#define CYREG_PERI_MS_PPU_FX559_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400293D4UL)
#define CYREG_PERI_MS_PPU_FX559_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400293D8UL)
#define CYREG_PERI_MS_PPU_FX559_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400293DCUL)
#define CYREG_PERI_MS_PPU_FX559_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400293E0UL)
#define CYREG_PERI_MS_PPU_FX559_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400293E4UL)
#define CYREG_PERI_MS_PPU_FX559_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400293F0UL)
#define CYREG_PERI_MS_PPU_FX559_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400293F4UL)
#define CYREG_PERI_MS_PPU_FX559_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400293F8UL)
#define CYREG_PERI_MS_PPU_FX559_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400293FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX560)
  */
#define CYREG_PERI_MS_PPU_FX560_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029400UL)
#define CYREG_PERI_MS_PPU_FX560_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029404UL)
#define CYREG_PERI_MS_PPU_FX560_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029410UL)
#define CYREG_PERI_MS_PPU_FX560_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029414UL)
#define CYREG_PERI_MS_PPU_FX560_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029418UL)
#define CYREG_PERI_MS_PPU_FX560_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002941CUL)
#define CYREG_PERI_MS_PPU_FX560_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029420UL)
#define CYREG_PERI_MS_PPU_FX560_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029424UL)
#define CYREG_PERI_MS_PPU_FX560_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029430UL)
#define CYREG_PERI_MS_PPU_FX560_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029434UL)
#define CYREG_PERI_MS_PPU_FX560_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029438UL)
#define CYREG_PERI_MS_PPU_FX560_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002943CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX561)
  */
#define CYREG_PERI_MS_PPU_FX561_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029440UL)
#define CYREG_PERI_MS_PPU_FX561_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029444UL)
#define CYREG_PERI_MS_PPU_FX561_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029450UL)
#define CYREG_PERI_MS_PPU_FX561_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029454UL)
#define CYREG_PERI_MS_PPU_FX561_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029458UL)
#define CYREG_PERI_MS_PPU_FX561_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002945CUL)
#define CYREG_PERI_MS_PPU_FX561_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029460UL)
#define CYREG_PERI_MS_PPU_FX561_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029464UL)
#define CYREG_PERI_MS_PPU_FX561_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029470UL)
#define CYREG_PERI_MS_PPU_FX561_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029474UL)
#define CYREG_PERI_MS_PPU_FX561_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029478UL)
#define CYREG_PERI_MS_PPU_FX561_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002947CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX562)
  */
#define CYREG_PERI_MS_PPU_FX562_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029480UL)
#define CYREG_PERI_MS_PPU_FX562_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029484UL)
#define CYREG_PERI_MS_PPU_FX562_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029490UL)
#define CYREG_PERI_MS_PPU_FX562_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029494UL)
#define CYREG_PERI_MS_PPU_FX562_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029498UL)
#define CYREG_PERI_MS_PPU_FX562_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002949CUL)
#define CYREG_PERI_MS_PPU_FX562_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400294A0UL)
#define CYREG_PERI_MS_PPU_FX562_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400294A4UL)
#define CYREG_PERI_MS_PPU_FX562_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400294B0UL)
#define CYREG_PERI_MS_PPU_FX562_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400294B4UL)
#define CYREG_PERI_MS_PPU_FX562_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400294B8UL)
#define CYREG_PERI_MS_PPU_FX562_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400294BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX563)
  */
#define CYREG_PERI_MS_PPU_FX563_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400294C0UL)
#define CYREG_PERI_MS_PPU_FX563_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400294C4UL)
#define CYREG_PERI_MS_PPU_FX563_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400294D0UL)
#define CYREG_PERI_MS_PPU_FX563_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400294D4UL)
#define CYREG_PERI_MS_PPU_FX563_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400294D8UL)
#define CYREG_PERI_MS_PPU_FX563_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400294DCUL)
#define CYREG_PERI_MS_PPU_FX563_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400294E0UL)
#define CYREG_PERI_MS_PPU_FX563_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400294E4UL)
#define CYREG_PERI_MS_PPU_FX563_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400294F0UL)
#define CYREG_PERI_MS_PPU_FX563_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400294F4UL)
#define CYREG_PERI_MS_PPU_FX563_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400294F8UL)
#define CYREG_PERI_MS_PPU_FX563_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400294FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX564)
  */
#define CYREG_PERI_MS_PPU_FX564_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029500UL)
#define CYREG_PERI_MS_PPU_FX564_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029504UL)
#define CYREG_PERI_MS_PPU_FX564_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029510UL)
#define CYREG_PERI_MS_PPU_FX564_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029514UL)
#define CYREG_PERI_MS_PPU_FX564_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029518UL)
#define CYREG_PERI_MS_PPU_FX564_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002951CUL)
#define CYREG_PERI_MS_PPU_FX564_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029520UL)
#define CYREG_PERI_MS_PPU_FX564_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029524UL)
#define CYREG_PERI_MS_PPU_FX564_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029530UL)
#define CYREG_PERI_MS_PPU_FX564_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029534UL)
#define CYREG_PERI_MS_PPU_FX564_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029538UL)
#define CYREG_PERI_MS_PPU_FX564_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002953CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX565)
  */
#define CYREG_PERI_MS_PPU_FX565_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029540UL)
#define CYREG_PERI_MS_PPU_FX565_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029544UL)
#define CYREG_PERI_MS_PPU_FX565_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029550UL)
#define CYREG_PERI_MS_PPU_FX565_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029554UL)
#define CYREG_PERI_MS_PPU_FX565_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029558UL)
#define CYREG_PERI_MS_PPU_FX565_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002955CUL)
#define CYREG_PERI_MS_PPU_FX565_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029560UL)
#define CYREG_PERI_MS_PPU_FX565_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029564UL)
#define CYREG_PERI_MS_PPU_FX565_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029570UL)
#define CYREG_PERI_MS_PPU_FX565_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029574UL)
#define CYREG_PERI_MS_PPU_FX565_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029578UL)
#define CYREG_PERI_MS_PPU_FX565_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002957CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX566)
  */
#define CYREG_PERI_MS_PPU_FX566_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029580UL)
#define CYREG_PERI_MS_PPU_FX566_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029584UL)
#define CYREG_PERI_MS_PPU_FX566_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029590UL)
#define CYREG_PERI_MS_PPU_FX566_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029594UL)
#define CYREG_PERI_MS_PPU_FX566_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029598UL)
#define CYREG_PERI_MS_PPU_FX566_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002959CUL)
#define CYREG_PERI_MS_PPU_FX566_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400295A0UL)
#define CYREG_PERI_MS_PPU_FX566_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400295A4UL)
#define CYREG_PERI_MS_PPU_FX566_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400295B0UL)
#define CYREG_PERI_MS_PPU_FX566_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400295B4UL)
#define CYREG_PERI_MS_PPU_FX566_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400295B8UL)
#define CYREG_PERI_MS_PPU_FX566_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400295BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX567)
  */
#define CYREG_PERI_MS_PPU_FX567_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400295C0UL)
#define CYREG_PERI_MS_PPU_FX567_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400295C4UL)
#define CYREG_PERI_MS_PPU_FX567_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400295D0UL)
#define CYREG_PERI_MS_PPU_FX567_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400295D4UL)
#define CYREG_PERI_MS_PPU_FX567_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400295D8UL)
#define CYREG_PERI_MS_PPU_FX567_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400295DCUL)
#define CYREG_PERI_MS_PPU_FX567_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400295E0UL)
#define CYREG_PERI_MS_PPU_FX567_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400295E4UL)
#define CYREG_PERI_MS_PPU_FX567_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400295F0UL)
#define CYREG_PERI_MS_PPU_FX567_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400295F4UL)
#define CYREG_PERI_MS_PPU_FX567_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400295F8UL)
#define CYREG_PERI_MS_PPU_FX567_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400295FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX568)
  */
#define CYREG_PERI_MS_PPU_FX568_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029600UL)
#define CYREG_PERI_MS_PPU_FX568_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029604UL)
#define CYREG_PERI_MS_PPU_FX568_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029610UL)
#define CYREG_PERI_MS_PPU_FX568_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029614UL)
#define CYREG_PERI_MS_PPU_FX568_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029618UL)
#define CYREG_PERI_MS_PPU_FX568_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002961CUL)
#define CYREG_PERI_MS_PPU_FX568_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029620UL)
#define CYREG_PERI_MS_PPU_FX568_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029624UL)
#define CYREG_PERI_MS_PPU_FX568_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029630UL)
#define CYREG_PERI_MS_PPU_FX568_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029634UL)
#define CYREG_PERI_MS_PPU_FX568_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029638UL)
#define CYREG_PERI_MS_PPU_FX568_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002963CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX569)
  */
#define CYREG_PERI_MS_PPU_FX569_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029640UL)
#define CYREG_PERI_MS_PPU_FX569_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029644UL)
#define CYREG_PERI_MS_PPU_FX569_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029650UL)
#define CYREG_PERI_MS_PPU_FX569_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029654UL)
#define CYREG_PERI_MS_PPU_FX569_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029658UL)
#define CYREG_PERI_MS_PPU_FX569_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002965CUL)
#define CYREG_PERI_MS_PPU_FX569_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029660UL)
#define CYREG_PERI_MS_PPU_FX569_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029664UL)
#define CYREG_PERI_MS_PPU_FX569_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029670UL)
#define CYREG_PERI_MS_PPU_FX569_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029674UL)
#define CYREG_PERI_MS_PPU_FX569_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029678UL)
#define CYREG_PERI_MS_PPU_FX569_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002967CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX570)
  */
#define CYREG_PERI_MS_PPU_FX570_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029680UL)
#define CYREG_PERI_MS_PPU_FX570_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029684UL)
#define CYREG_PERI_MS_PPU_FX570_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029690UL)
#define CYREG_PERI_MS_PPU_FX570_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029694UL)
#define CYREG_PERI_MS_PPU_FX570_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029698UL)
#define CYREG_PERI_MS_PPU_FX570_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002969CUL)
#define CYREG_PERI_MS_PPU_FX570_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400296A0UL)
#define CYREG_PERI_MS_PPU_FX570_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400296A4UL)
#define CYREG_PERI_MS_PPU_FX570_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400296B0UL)
#define CYREG_PERI_MS_PPU_FX570_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400296B4UL)
#define CYREG_PERI_MS_PPU_FX570_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400296B8UL)
#define CYREG_PERI_MS_PPU_FX570_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400296BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX571)
  */
#define CYREG_PERI_MS_PPU_FX571_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400296C0UL)
#define CYREG_PERI_MS_PPU_FX571_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400296C4UL)
#define CYREG_PERI_MS_PPU_FX571_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400296D0UL)
#define CYREG_PERI_MS_PPU_FX571_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400296D4UL)
#define CYREG_PERI_MS_PPU_FX571_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400296D8UL)
#define CYREG_PERI_MS_PPU_FX571_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400296DCUL)
#define CYREG_PERI_MS_PPU_FX571_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400296E0UL)
#define CYREG_PERI_MS_PPU_FX571_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400296E4UL)
#define CYREG_PERI_MS_PPU_FX571_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400296F0UL)
#define CYREG_PERI_MS_PPU_FX571_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400296F4UL)
#define CYREG_PERI_MS_PPU_FX571_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400296F8UL)
#define CYREG_PERI_MS_PPU_FX571_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400296FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX572)
  */
#define CYREG_PERI_MS_PPU_FX572_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029700UL)
#define CYREG_PERI_MS_PPU_FX572_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029704UL)
#define CYREG_PERI_MS_PPU_FX572_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029710UL)
#define CYREG_PERI_MS_PPU_FX572_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029714UL)
#define CYREG_PERI_MS_PPU_FX572_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029718UL)
#define CYREG_PERI_MS_PPU_FX572_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002971CUL)
#define CYREG_PERI_MS_PPU_FX572_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029720UL)
#define CYREG_PERI_MS_PPU_FX572_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029724UL)
#define CYREG_PERI_MS_PPU_FX572_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029730UL)
#define CYREG_PERI_MS_PPU_FX572_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029734UL)
#define CYREG_PERI_MS_PPU_FX572_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029738UL)
#define CYREG_PERI_MS_PPU_FX572_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002973CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX573)
  */
#define CYREG_PERI_MS_PPU_FX573_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029740UL)
#define CYREG_PERI_MS_PPU_FX573_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029744UL)
#define CYREG_PERI_MS_PPU_FX573_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029750UL)
#define CYREG_PERI_MS_PPU_FX573_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029754UL)
#define CYREG_PERI_MS_PPU_FX573_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029758UL)
#define CYREG_PERI_MS_PPU_FX573_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002975CUL)
#define CYREG_PERI_MS_PPU_FX573_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029760UL)
#define CYREG_PERI_MS_PPU_FX573_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029764UL)
#define CYREG_PERI_MS_PPU_FX573_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029770UL)
#define CYREG_PERI_MS_PPU_FX573_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029774UL)
#define CYREG_PERI_MS_PPU_FX573_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029778UL)
#define CYREG_PERI_MS_PPU_FX573_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002977CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX574)
  */
#define CYREG_PERI_MS_PPU_FX574_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029780UL)
#define CYREG_PERI_MS_PPU_FX574_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029784UL)
#define CYREG_PERI_MS_PPU_FX574_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029790UL)
#define CYREG_PERI_MS_PPU_FX574_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029794UL)
#define CYREG_PERI_MS_PPU_FX574_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029798UL)
#define CYREG_PERI_MS_PPU_FX574_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002979CUL)
#define CYREG_PERI_MS_PPU_FX574_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400297A0UL)
#define CYREG_PERI_MS_PPU_FX574_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400297A4UL)
#define CYREG_PERI_MS_PPU_FX574_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400297B0UL)
#define CYREG_PERI_MS_PPU_FX574_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400297B4UL)
#define CYREG_PERI_MS_PPU_FX574_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400297B8UL)
#define CYREG_PERI_MS_PPU_FX574_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400297BCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX575)
  */
#define CYREG_PERI_MS_PPU_FX575_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x400297C0UL)
#define CYREG_PERI_MS_PPU_FX575_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x400297C4UL)
#define CYREG_PERI_MS_PPU_FX575_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x400297D0UL)
#define CYREG_PERI_MS_PPU_FX575_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x400297D4UL)
#define CYREG_PERI_MS_PPU_FX575_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x400297D8UL)
#define CYREG_PERI_MS_PPU_FX575_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x400297DCUL)
#define CYREG_PERI_MS_PPU_FX575_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400297E0UL)
#define CYREG_PERI_MS_PPU_FX575_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400297E4UL)
#define CYREG_PERI_MS_PPU_FX575_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400297F0UL)
#define CYREG_PERI_MS_PPU_FX575_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400297F4UL)
#define CYREG_PERI_MS_PPU_FX575_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400297F8UL)
#define CYREG_PERI_MS_PPU_FX575_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400297FCUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX576)
  */
#define CYREG_PERI_MS_PPU_FX576_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029800UL)
#define CYREG_PERI_MS_PPU_FX576_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029804UL)
#define CYREG_PERI_MS_PPU_FX576_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029810UL)
#define CYREG_PERI_MS_PPU_FX576_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029814UL)
#define CYREG_PERI_MS_PPU_FX576_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029818UL)
#define CYREG_PERI_MS_PPU_FX576_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002981CUL)
#define CYREG_PERI_MS_PPU_FX576_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029820UL)
#define CYREG_PERI_MS_PPU_FX576_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029824UL)
#define CYREG_PERI_MS_PPU_FX576_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029830UL)
#define CYREG_PERI_MS_PPU_FX576_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029834UL)
#define CYREG_PERI_MS_PPU_FX576_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029838UL)
#define CYREG_PERI_MS_PPU_FX576_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002983CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX577)
  */
#define CYREG_PERI_MS_PPU_FX577_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029840UL)
#define CYREG_PERI_MS_PPU_FX577_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029844UL)
#define CYREG_PERI_MS_PPU_FX577_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029850UL)
#define CYREG_PERI_MS_PPU_FX577_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029854UL)
#define CYREG_PERI_MS_PPU_FX577_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029858UL)
#define CYREG_PERI_MS_PPU_FX577_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002985CUL)
#define CYREG_PERI_MS_PPU_FX577_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x40029860UL)
#define CYREG_PERI_MS_PPU_FX577_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x40029864UL)
#define CYREG_PERI_MS_PPU_FX577_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x40029870UL)
#define CYREG_PERI_MS_PPU_FX577_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x40029874UL)
#define CYREG_PERI_MS_PPU_FX577_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x40029878UL)
#define CYREG_PERI_MS_PPU_FX577_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x4002987CUL)

/**
  * \brief Fixed protection structure pair (PERI_MS_PPU_FX578)
  */
#define CYREG_PERI_MS_PPU_FX578_SL_ADDR ((volatile un_PERI_MS_PPU_FX_SL_ADDR_t*) 0x40029880UL)
#define CYREG_PERI_MS_PPU_FX578_SL_SIZE ((volatile un_PERI_MS_PPU_FX_SL_SIZE_t*) 0x40029884UL)
#define CYREG_PERI_MS_PPU_FX578_SL_ATT0 ((volatile un_PERI_MS_PPU_FX_SL_ATT0_t*) 0x40029890UL)
#define CYREG_PERI_MS_PPU_FX578_SL_ATT1 ((volatile un_PERI_MS_PPU_FX_SL_ATT1_t*) 0x40029894UL)
#define CYREG_PERI_MS_PPU_FX578_SL_ATT2 ((volatile un_PERI_MS_PPU_FX_SL_ATT2_t*) 0x40029898UL)
#define CYREG_PERI_MS_PPU_FX578_SL_ATT3 ((volatile un_PERI_MS_PPU_FX_SL_ATT3_t*) 0x4002989CUL)
#define CYREG_PERI_MS_PPU_FX578_MS_ADDR ((volatile un_PERI_MS_PPU_FX_MS_ADDR_t*) 0x400298A0UL)
#define CYREG_PERI_MS_PPU_FX578_MS_SIZE ((volatile un_PERI_MS_PPU_FX_MS_SIZE_t*) 0x400298A4UL)
#define CYREG_PERI_MS_PPU_FX578_MS_ATT0 ((volatile un_PERI_MS_PPU_FX_MS_ATT0_t*) 0x400298B0UL)
#define CYREG_PERI_MS_PPU_FX578_MS_ATT1 ((volatile un_PERI_MS_PPU_FX_MS_ATT1_t*) 0x400298B4UL)
#define CYREG_PERI_MS_PPU_FX578_MS_ATT2 ((volatile un_PERI_MS_PPU_FX_MS_ATT2_t*) 0x400298B8UL)
#define CYREG_PERI_MS_PPU_FX578_MS_ATT3 ((volatile un_PERI_MS_PPU_FX_MS_ATT3_t*) 0x400298BCUL)

#endif /* _CYREG_PERI_MS_H_ */


/* [] END OF FILE */
